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Behaviour of instructions on 32bit operands in 64 bit mode

anujgarg2004gmail_co
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what happens to the upper bits of rax in the following instruction.

mov eax, 1;

what about reading from memory?

mov eax, [0x12345678].

is it possible to say something like

mov rax, ecx # sign extend the values of ecx. or pad it with zeros

i am writting a compiler with uses 64 bit pointers but 32 bit integers and i need to interconvert between 32 and 64 bits because its not a statically typed language. any special instructions which can be helpful.

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1 Solution
neni
New Contributor II
1,667 Views
3.4.1 is volume 1
"When in 64-bit mode, operand size determines the number of valid bits in the destination
general-purpose register:
64-bit operands generate a 64-bit result in the destination general-purpose
register.
32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in the
destination general-purpose register.
8-bit and 16-bit operands generate an 8-bit or 16-bit result. The upper 56 bits or
48 bits (respectively) of the destination general-purpose register are not be
modified by the operation. If the result of an 8-bit or 16-bit operation is intended
for 64-bit address calculation, explicitly sign-extend the register to the full
64-bits."

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4 Replies
neni
New Contributor II
1,667 Views
Upper 32 bits of the dst register are zeroed if you use 32 bit variant of the instruction (REX.W = 0 or no REX), mov eax,-1 willcause rax to hold 0x00000000ffffffff.

if you need sign extending 32->64, use movsxd
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carsten2
Beginner
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Quoting - neni
Upper 32 bits of the dst register are zeroed if you use 32 bit variant of the instruction (REX.W = 0 or no REX), mov eax,-1 willcause rax to hold 0x00000000ffffffff.

if you need sign extending 32->64, use movsxd
Hi Neni,
where can I find this type of information ?
I couldn't find such a definition for MOV and 64 bit register in the Software Developer Manual.
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neni
New Contributor II
1,668 Views
3.4.1 is volume 1
"When in 64-bit mode, operand size determines the number of valid bits in the destination
general-purpose register:
64-bit operands generate a 64-bit result in the destination general-purpose
register.
32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in the
destination general-purpose register.
8-bit and 16-bit operands generate an 8-bit or 16-bit result. The upper 56 bits or
48 bits (respectively) of the destination general-purpose register are not be
modified by the operation. If the result of an 8-bit or 16-bit operation is intended
for 64-bit address calculation, explicitly sign-extend the register to the full
64-bits."

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carsten2
Beginner
1,667 Views
Thanks, this is what I was looking for !
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