Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.

CPUID check and CR0 check

interruptrequestpack
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Hi all
I'm checking if VMX is supported on the processor and if I'm using paged-protected memory model, and enabling VMX operations.
So this is my asm snippet:
__asm {
mov eax, 1
cpuid
and ecx, 0x20
mov supported, ecx
}
__asm {
mov eax, cr0
and eax, 0x80000000
mov pgMode, eax
mov eax, cr0
and eax, 1
mov ppMode, eax
}
__asm {
or cr4, 0x2000
}
Could it work? (I do checks outside the inline with the boolead values supported, ppMode, pgMode)
Another thing: "ensure that CR4 value supports all the CR4 fixed bits reported inIA_32_VMX_CR4_FIXED" what does it means? (I know what fixed bits are, but how to check the support?)
Thanks!
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SergeyKostrov
Valued Contributor II
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Hi all
I'm checking if VMX is supported on the processor and if I'm using paged-protected memory model, and enabling VMX operations.
So this is my asm snippet:

__asm {
mov eax, 1
cpuid
and ecx, 0x20
mov supported, ecx
}

[SergeyK] Yes, it will work. A value 1 means thatthe CPU supports VMX (Virtual Machine Extensions )
technology.

__asm {
mov eax, cr0
and eax, 0x80000000
mov pgMode, eax
mov eax, cr0
and eax, 1
mov ppMode, eax
}

[SergeyK] Yes, it will workat priviledge level 0 only. An application cannot read or load the control
registers at priviledge levels 1, 2 and 3, and if executed at these levels an exception
'0xC0000096: Privileged instruction' will be raised.

__asm {
or cr4, 0x2000
}

Could it work? (I do checks outside the inline with the boolead values supported, ppMode, pgMode)
Another thing: "ensure that CR4 value supports all the CR4 fixed bits reported inIA_32_VMX_CR4_FIXED" what does it means? (I know what fixed bits are, but how to check the support?)
Thanks!

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SergeyKostrov
Valued Contributor II
784 Views

There is some support for reading and writing of CRx registers with intrinsic functions declaredin 'intrin.h' header file:

...
__MACHINEX64(unsigned __int64 __readcr0(void))
__MACHINEX64(unsigned __int64 __readcr2(void))
__MACHINEX64(unsigned __int64 __readcr3(void))
__MACHINEX64(unsigned __int64 __readcr4(void))
__MACHINEX64(unsigned __int64 __readcr8(void))
__MACHINEIA32(unsigned long __readcr0(void))
__MACHINEIA32(unsigned long __readcr2(void))
__MACHINEIA32(unsigned long __readcr3(void))
__MACHINEIA32(unsigned long __readcr4(void))
__MACHINEIA32(unsigned long __readcr8(void))

__MACHINEX64(void __writecr0(unsigned __int64))
__MACHINEX64(void __writecr3(unsigned __int64))
__MACHINEX64(void __writecr4(unsigned __int64))
__MACHINEX64(void __writecr8(unsigned __int64))
__MACHINEIA32(void __writecr0(unsigned))
__MACHINEIA32(void __writecr3(unsigned))
__MACHINEIA32(void __writecr4(unsigned))
__MACHINEIA32(void __writecr8(unsigned))
...

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