Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.

Core2 Quad (S)SSE 3/4

ocirne94
Principiante
4.287 Visualizações

Hello,

I use a Core2 Quad Q9400; I couldn't manage to find out wheter it supports SSE4 or SSSE3; can somebody tell me this?
Ocirne

0 Kudos
1 Solução
knutjohnsen
Principiante
4.287 Visualizações

Hi, you can look here: http://ark.intel.com/ProductCollection.aspx?familyID=28398 and look up your CPU.

Looking at the datasheet, you will find this information!

It's here: http://download.intel.com/design/processor/datashts/318726.pdf and on page 11 it states that it does indeed support SSSE3 and SSE4.1.

With regards.

Knut Johnsen

Ver solução na publicação original

4 Respostas
knutjohnsen
Principiante
4.288 Visualizações

Hi, you can look here: http://ark.intel.com/ProductCollection.aspx?familyID=28398 and look up your CPU.

Looking at the datasheet, you will find this information!

It's here: http://download.intel.com/design/processor/datashts/318726.pdf and on page 11 it states that it does indeed support SSSE3 and SSE4.1.

With regards.

Knut Johnsen

levicki
Contribuidor valorado I
4.287 Visualizações

The easiest way to figure that out is by using CPU-Z utility which you can download from www.cpuid.com if you are using Windows or by looking at /proc/cpuinfo under if you are using Linux.

If I remember correctly, Q9xxx series are based on Penryn 45nm core so they should support SSE4.1.

ocirne94
Principiante
4.287 Visualizações

Hello all,

thank you very much for your answers.

I just have another little doubt: does SSE4.1 instruction set include also SSSE3 instructions?

Thanks,

Ocirne

TimP
Colaborador honorário III
4.287 Visualizações

Yes, both SSE4.1 and 4.2 include SSSE3 instructions. However, compilers for SSE4.2 should avoid use of certain SSSE3 instructions, such as PALIGNR, in contexts where they were effective on the first CPUs which supported SSSE3.

I guess some of the architectural changes needed to support SSE4 inherently reduced the dependence on PALIGNR for efficiency.

Responder