- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
Hello,
I use a Core2 Quad Q9400; I couldn't manage to find out wheter it supports SSE4 or SSSE3; can somebody tell me this?
Ocirne
- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
Hi, you can look here: http://ark.intel.com/ProductCollection.aspx?familyID=28398 and look up your CPU.
Looking at the datasheet, you will find this information!
It's here: http://download.intel.com/design/processor/datashts/318726.pdf and on page 11 it states that it does indeed support SSSE3 and SSE4.1.
With regards.
Knut Johnsen
Link copiado
- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
Hi, you can look here: http://ark.intel.com/ProductCollection.aspx?familyID=28398 and look up your CPU.
Looking at the datasheet, you will find this information!
It's here: http://download.intel.com/design/processor/datashts/318726.pdf and on page 11 it states that it does indeed support SSSE3 and SSE4.1.
With regards.
Knut Johnsen
- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
The easiest way to figure that out is by using CPU-Z utility which you can download from www.cpuid.com if you are using Windows or by looking at /proc/cpuinfo under if you are using Linux.
If I remember correctly, Q9xxx series are based on Penryn 45nm core so they should support SSE4.1.
- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
Hello all,
thank you very much for your answers.
I just have another little doubt: does SSE4.1 instruction set include also SSSE3 instructions?
Thanks,
Ocirne
- Marcar como novo
- Marcador
- Subscrever
- Silenciar
- Subscrever fonte RSS
- Destacar
- Imprimir
- Denunciar conteúdo inapropriado
Yes, both SSE4.1 and 4.2 include SSSE3 instructions. However, compilers for SSE4.2 should avoid use of certain SSSE3 instructions, such as PALIGNR, in contexts where they were effective on the first CPUs which supported SSSE3.
I guess some of the architectural changes needed to support SSE4 inherently reduced the dependence on PALIGNR for efficiency.
- Subscrever fonte RSS
- Marcar tópico como novo
- Marcar tópico como lido
- Flutuar este Tópico para o utilizador atual
- Marcador
- Subscrever
- Página amigável para impressora