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Detailed idata.txt

Antonio_O_
Beginner
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Hello.
Does anyone know if there is a place where I can download or buy a detailed version of the "idata.txt" file that comes with pintools (extras\xed2-ia32\misc\) ?
Basically I need a complete list of all instructions (including AVX, AVX512, etc) in order to build my own assembler/disassembler.
The problem with the official PDFs is that it is not easy to extract the required information and sometimes it contains errors.
Thank you

 

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MarkC_Intel
Moderator
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I can look at adding the idata.txt file to the next external Intel® SDE kit (http://www.intel.com/software/sde) or as an small update.  It is typically a while before the Pin team makes compilation changes to include new instructions in their external releases. 

That said, there are some things that the idata.txt file omits as far as the new features of the AVX512 encodings space that you would need to make an assembler. Like the opcodes(!!) and what operand gets encoded where (modrm.reg, modrm.rm, etc.), which instructions support embedded rounding/sae, which instructions support zeroing, etc.   I am thinking about what we might be able to release that could simplify the job of the various assembler writers. 

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Antonio_O_
Beginner
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Hello Mark. Thank you for your answer. I already have a disassembler that was built using the information from the official PDFs. For example I have a master table of instructions like this /* IIDX_VFMSUB231SD_xmm_xmmv_xmmmem64 */ { X(VFMSUB231SD), O(xmm_xmmv_xmmmem64), T(VEX660F38W19XBX, 0xbb), C(N_N_N_N_N_N_N_N_N_N_N), F(Y_Y_Y_N_Y_Y_N), IF(INV_VEX_L1) | IF(INV_VEX_W0) }, /* IIDX_VFMSUB231SS_xmm_xmmv_xmmmem32 */ { X(VFMSUB231SS), O(xmm_xmmv_xmmmem32), T(VEX660F38, 0xbb), C(N_N_N_N_N_N_N_N_N_N_N), F(Y_Y_Y_N_Y_Y_N), IF(INV_VEX_L1) | IF(INV_VEX_W1) }, Basically I've identified a) X(...) => all possible instructions without any operands b) O(...) => all possible combinations of operands c) T(..., ...) all possible tables of instructions (one opcode, 0f , vex 0f, vex 0f 38, etc) d) C(...) => the flags changed by each instruction (OF SF ZF AF PF CF TF IF DF NF RF) e) F(...) => the FPU exceptions originated by each instruction (IS IA D Z U O P) f) IF(...) => behavior flags This table works pretty well for the disassemble and is ready to be used by a simple assembler since it contains opcode information. The problem with this solution is accuracy and maintenance because extracting the information from the PDFs is not an easy job (info is scattered over multiple sections, etc). So I thought that if Intel provides or sells (yes I'm willing to buy it) some set of files with all the information I would be able to make some tool that converts those files to my own format. This would also mean that new instructions would be easier to incorporate by making adjustments to the engine (for example adding AVX512) and reconverting the files. I don't know how XED was implemented but "idata.txt" gave me the idea that it uses some internal table based on it. But maybe I got it wrong and its the opposite i.e. "idata.txt" was generated using XED internal tables. If the information I'm seeking doesn't even exist then I'll probably end up doing my own file with a GUI editor to make things easier. The output of that application would be the .H/.C files needed by the assembler/disassembler. This tool would probably be free so that others could contribute and use the same database.
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