Difference between L2 cache misses and Bus_Trans_Mem
I have a small doubt as to how to find out the number of main memroy accesses from a performacne counter. L2 cache misses all access the memory but there is a performance counter Bus_Trans_Mem also. Can anyone please tell me the difference between them and the better one to estimate the number of memory accesses.
bus transcation counter should give you what you are looking for. L2 misses can sometime be 2 mem transcation (if a dirt line need to be evicted for example) and also L2 doesn't count uncacheable access (MMIO for example)