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Hardware acceleration of Special Functions.

Bernard
Valued Contributor I
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Hi!
I would like to ask Intel's employees on this forum.Why IntelCPU architects have never implemented in hardware some of themore "popular" Special Functions like'GAMMA','BETA' and various 'BESSEL' functions of an integer order.All these functions could have been accessed byx87 ISAinstructions.
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SergeyKostrov
Valued Contributor II
486 Views
Quoting bronxzv
...it was probably something like 50-100 cyclesforFP32 FMUL and FADD (based on my past experience writing FP emulation routines)...


It looks realistic. Why wouldn't we call to AMD and ask? :)

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Bernard
Valued Contributor I
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think AMDusesa "Vector Table" termbecause Intel calls a similar structure as an"Interrupt Descriptor Table

It was called IVT i.e "Interrupt Vector Table" and we are talking about the DOS and 8086 CPU.
Judging by the definition of the vector as a unit composed from the number of scalars.IVT can not be called a vector nor IDT.Because these structures contain a scalar member fields which point to descriptors(in the case of IDT).
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SergeyKostrov
Valued Contributor II
486 Views
Quoting iliyapolak

think AMDusesa "Vector Table" termbecause Intel calls a similar structure as an"Interrupt Descriptor Table

It was called IVT i.e "Interrupt Vector Table" and we are talking about the DOS and 8086 CPU...

Does it change an essence of interrupt or trapprocessing for Am29K microcontrollers?
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Bernard
Valued Contributor I
486 Views
It is not related to AMD 29k microcontrollers.The question is why scalar member is called a vector.
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SergeyKostrov
Valued Contributor II
486 Views
Quoting bronxzv
...it was probably something like 50-100 cyclesforFP32 FMUL and FADD (based on my past experience writing FP emulation routines)...


It looks realistic. Why wouldn't we call to AMD and ask? :)


I've sent an email to AMD and this is a core part of my e-mail:

Q:
My question is related to a legacy RISC microcontroller Am29200. The microcontroller supports 18 floating-point instructions and
all of them are emulated using traps:

How many clock cycles are needed to execute FADD or FSUB instructions?

and here is a response from AMD:

A:
AM29xxx products have not belonged to AMD since 2005. You should contact Spansion for any questions on these products:

http://www.spansion.com/support/ses/ses.html

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Bernard
Valued Contributor I
486 Views

A:
AM29xxx products have not belonged to AMD since 2005. You should contact Spansion for any questions on these products

was not sure that AMD will answer your e-mail so fast.It looks like they sold their miucrocontrollers division to Spansion.
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SergeyKostrov
Valued Contributor II
486 Views
Quoting iliyapolak

A:
AM29xxx products have not belonged to AMD since 2005. You should contact Spansion for any questions on these products

was not sure that AMD will answer your e-mail so fast. It looks like they sold their miucrocontrollers division to Spansion.


Intel sold a similar division ( some CPUs for embedded platforms )to Marvell.

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Bernard
Valued Contributor I
486 Views

@Sergey

I think that we can come to conclusion that there is no such a thing as hardware accelerated special functions.

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