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How interrupt is acknowledged by front side bus?

logicman112
Beginner
151 Views
My question is about Intel Core 2 Duo processor when local APIC is disabled and NMI and INTR pins are connected to an external PIC(programmable interrupt controller). Interrupt comes but how interrupt is acknowledged by CPU on FSB (front side bus)? I mean what signals and pins of the processor will eventually generate an interupt acknowledge cycle (on PCI bus)?
Why data sheet of Core 2 Duo does not explain such a scenario?
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Aubrey_W_
New Contributor I
151 Views
Please see my answer at http://software.intel.com/en-us/forums/showthread.php?t=76508&o=d&s=lr.

Best regards,

==
Aubrey W.
Intel Software Network Support
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