Why there is no timing diagram or bus access cycles of Intel processors? How Core 2 Due processors separate memory for I/O access? What pins
and signals are involved?
Data sheets of Intel processors do not explain memory, I/O read/write cycles and the related signals and their relations.
If your company has its own Intel representative, you may want to inquire whether they are able to assist with your inquiry. Your companys Purchasing Department will normally have your Intel representatives contact information. If you do not have this contact information, please visit the following Web site and look under (Design Components): www.intel.com/buy/networking/design.htm
A list of Intel Authorized Distributors can be found on the Web site below:
If you have questions or require further assistance, please let me know.
Intel Software Network Support