Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.
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IA32_TSC_AUX MSR

Montero__Bonita
Beginner
‎12-13-2019 07:08 PM
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Can anyone here tell me where the IA32_TSC_AUX_MSR of each hw-thread register is set?
Is it set by the operating system?

Thanks in advance.

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McCalpinJohn
Honored Contributor III
‎12-14-2019 02:53 PM
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Linux has supported this MSR since it was first introduced at least 10 years ago....   I don't know if the code that sets the values is in the same place from generation to generation, but I have not run across incorrect values in the MSR....

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