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Why has no-one combined left- and right- shift into a single shift operation with a signed shift amount? This would allow simultaneously left-shifting and right-shifting in e.g SIMD. It would also be useful in typical GPR instructions (including a double-precision version like SHRD/SHLD). I have one use at this moment: Shifting a 128-bit value between two GPR registers left or right by a signed integer (currently doing both and then conditionally moving the correct result to the destination regs).
Why is this not yet implemented? Are there issues in hardware which prevent such instructions from being implemented?
- Tags:
- Intel® Advanced Vector Extensions (Intel® AVX)
- Intel® Streaming SIMD Extensions
- Parallel Computing
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