Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.
Announcements
Welcome to the Intel Community. If you get an answer you like, please mark it as an Accepted Solution to help others. Thank you!

intel phi bandwith

Guangming_T_
Beginner
77 Views

Hi All,

      I am writing an application on MIC architecture,  I want to know the bandwith between each memory device.

Like bandwidth between core and L1, L1 and L2, L2 and memory.  I want these information to evaluate my application.

So I want to know how many Load can be issued each clock cycle. ? 

How many cycles needed to translate a 64byte cache line from L2 to L1 ?

0 Kudos
2 Replies
Guangming_T_
Beginner
77 Views

I am a little urgent  for these data, please help me. Thank you~

Bernard
Black Belt
77 Views

I think that VTune for Linux can be helpful in your case.You can also try to ask your question on MIC forum.

Reply