- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello everyone,
I have read the whitepaper on AES-NI where AESENC used the typical Rijndael Functions SubBytes, MicColumns and so on. However, I cannot find a reference of the implementation to these functions. I would like to study them more so it would be very helpful if someone could tell me where to find them?
More precisely, I would like to get it as assembler instructions in order to compute the cycles for each of these functions.
Thank you in advance.
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Thanks for posting in Intel Communities.
Please refer to below link to get more details on implementation of the functions.
Thanks & Regards,
Noorjahan.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, I have replied seperately to your answer. Please view below. Sorry.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi @NorjaahanSk_Intel,
Thank you for the reply. I have already seen this reference and I could not find the Information I was looking for. Where on this reference are you able to find the AES-NI Implementations for SubBytes and so on?
Probably I need to explain my problem a bit more:
https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
States that AESENC, used by AES-NI, performes the following operations:
AESENC xmm1, xmm2/m128 Tmp := xmm1 Round Key := xmm2/m128 Tmp := ShiftRows (Tmp) Tmp := SubBytes (Tmp) Tmp := MixColumns (Tmp) xmm1 := Tmp xor Round Key
What I want to find out is the Implementation of the functions ShiftRows, SubBytes and MixColumns.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
All the IPP crypto source code is public released at Intel Github.
Please refer to the below link for more details on assembler instructions:
https://github.com/intel/ipp-crypto/tree/develop/sources/ippcp/asm_intel64
Thanks & Regards,
Noorjahan.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
We haven't heard back from you. Could you please provide an update on your issue?
Thanks & Regards,
Noorjahan.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
My apologies. I have not found the code I wanted to. But it doesn't matter, since I found another way to solve my problem. Thank you regardless
Kind regards,
Sergej
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Glad to know that your issue is resolved. If you need any additional information, please post a new question as this thread will no longer be monitored by Intel.
Thanks & Regards,
Noorjahan.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page