Intel® Integrated Performance Primitives
Deliberate problems developing high-performance vision, signal, security, and storage applications.

Intel IPP 7.1 Crashes on AMD CPU

Royi
Novice
1,231 Views

Hello,

I am using Intel IPP 7.1 Update 1 for image processing.

I'm compiling the code statically (Single Thread).

When running the code on AMD Phenom II the program crashes.
Yet on Intel CPU it works with no problems.

I know you disable many of the optimizations when running on AMD CPU's, yet I wasn't aware there is no compatibility.

Could you address that?

Thank You.

0 Kudos
5 Replies
Igor_A_Intel
Employee
1,231 Views

Hi Royi,

IPP doesn't disable any optimizations for AMD CPUs - IPP dispatching mechanism is based on features supported by current CPU, so as Phenom II supports SSE2 and SSE3 - w7 code should be dispatched for ia32 mode and m7 for x64. Could you be more specific and provide an output from ippGetLibVersion function? Could you provide more information about the crash you've faced with - is it illegal instruction or access violation or anything else?

Regards, Igor

0 Kudos
Royi
Novice
1,231 Views

Hi Igor,

First of all, the Phenom II supports SSE4:

http://en.wikipedia.org/wiki/Phenom_II

I my self compiles on a computer with i3 CPU (Second generation 2xxx).

I use the following include:

#include "ippi.h"
#include "ippcore.h"
#include "ipps.h"
#include "ippcv.h"
#include "ippcc.h"

And call 'ippStaticInit' at the first line of my code.

I link against the static libraries according to:

https://software.intel.com/en-us/articles/selecting-the-intelr-ipp-libraries-needed-by-your-application/

I send the compiled program to a friend of mine which has Phenom II CPU and it crashes.

What could that be?

Does Intel IPP considers the Phenom as a SSE3 only CPU?

Thank You.

0 Kudos
Igor_A_Intel
Employee
1,231 Views

Hi Royi,

Phenom II supports SSE4a - this instruction set is not equivalent to SSE4 from Intel, moreover - it's absolutely different and is supported by AMD CPUs only (just 4 new instructions like extrq/insrtq/movntsd/ss, while Intel SSE4 introduces 52 new instructions that are divided in 2 subsets - SSE4.1 and SSE4.2). Could you prove that your application crashes in some IPP function? Could you be more specific? Could you provide an output from ippGetLibVersion? What is your OS? What is your architecture - ia32 or x64? I can't provide you any diagnose "what's wrong" based on your words above. BTW - do use compiler (which compiler do you use?) with optimization switches for SSE4?

regards, Igor

0 Kudos
Royi
Novice
1,231 Views

Hi Igor,

As I told you, I'm running IPP version 7.1 Update 1.
What do you expect to see on ippGetLibVersion?
I can only run it on my platform.

All the program does is simple blur on image, nothing beyond that.
It works on Intel and not on AMD, hence I thought it is something related to IPP (As nothing else there).

The OS it crashed on is Windows 7 64 bit.
I only work with 64 bit.

I use Intel Compiler 2013 Update 2.

By the way, should we use 'ippStaticInit()' or 'ippInit()'?
As in some places you mark 'ippStaticInit()' as deprecated.

Thank You.

0 Kudos
Igor_A_Intel
Employee
1,231 Views

Hi Royi,

ippStaticInit() and ippInit() functions share the same code - the purpose to deprecate the first one is just to get rid of confusion in the function naming - I mean the suffix "Static". So it doesn't matter which one is called in your application. I need an output from GetLibVersion because it shows which version of code has been dispatched. IPP merged static library for x64 arch has the next optimizations: MX - for SSE2, M7 - for SSE3, U8- for SSSE3, N8 - for Atom (SSSE3+MOVBE), Y8 - for SSE4, E9 - for AVX, + (in the latest IPP versions) L9 - for AVX2. So to be sure that the crash your friend has faced with is not related to IPP - I need to know which library letter has been dispatched. For Phenom II it should be M7. Also you can use the code below for such test:

#include "ipp.h"
#include <stdio.h>
int main(int argc, char* argv[])
{
        const IppLibraryVersion *lib;
        Ipp64u fm;
        IppStatus status;

        status= ippInit();            //IPP initialization with the best optimization layer
        if( status != ippStsNoErr ) {
                printf("IppInit() Error:\n");
                printf("%s\n", ippGetStatusString(status) );
                return -1;
        }

        //Get version info
        lib = ippiGetLibVersion();
        printf("%s %s\n", lib->Name, lib->Version);

        //Get CPU features enabled with selected library level
        fm=ippGetEnabledCpuFeatures();
        printf("SSE    :%c\n",(fm>>1)&1?'Y':'N');
        printf("SSE2   :%c\n",(fm>>2)&1?'Y':'N');
        printf("SSE3   :%c\n",(fm>>3)&1?'Y':'N');
        printf("SSSE3  :%c\n",(fm>>4)&1?'Y':'N');
        printf("SSE41  :%c\n",(fm>>6)&1?'Y':'N');
        printf("SSE42  :%c\n",(fm>>7)&1?'Y':'N');
        printf("AVX    :%c\n",(fm>>8)&1 ?'Y':'N');
        printf("AVX2   :%c\n", (fm>>15)&1 ?'Y':'N' );
        printf("----------\n");
        printf("OS Enabled AVX :%c\n", (fm>>9)&1 ?'Y':'N');
        printf("AES            :%c\n", (fm>>10)&1?'Y':'N');
        printf("CLMUL          :%c\n", (fm>>11)&1?'Y':'N');
        printf("RDRAND         :%c\n", (fm>>13)&1?'Y':'N');
        printf("F16C           :%c\n", (fm>>14)&1?'Y':'N');

        return 0;
}

Regards, Igor

0 Kudos
Reply