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Could T1 and T2 use cmpxchg without a lock prefixto modify D?
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DOH! I mean't: cmpxchg does a redundant write that can probably be observed "without" the lock prefix... Sorry.
lockfree wrote:
Could T1 and T2 use cmpxchg without a lock prefixto modify D?
I think the answer is no, because cmpxchg does a redundant write that can probably be observed with the lock prefix...
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I posed this question to Phil Kerly, one of the Intel experts on Hyper-Threading. His response was that cmpxchg is NOT HT-safe without the 'lock' prefix. He sent a quick example that demonstrates this. I've attached the code to this post.
Phil's instructions for using this demo code:
Find the line #define LOCK_EXAMPLE in the attached Windows file which I hacked together. You can uncomment this line to remove the lock prefix.
With the lock prefix, the program will run indefinitely until you enter ctrl-C to stop it. Without the lock prefix, the program will terminate once is detects an unexpected condition.
Two threads are created and affinitized to each of the logical HT processors. Each thread updates 16-bits of a 32-bit quantity using cmpxchg. One thread only updates the upper half. The other thread only updates the lower half. If at any time either thread detects that its portion does not match its expected value, the program will exit with a message stating that there has been a violation.
I hope this helps.
--clay
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