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There is a great link on the Altera web page explaining how to implement a 3 input parallel adder in one ALM.
http://www.altera.com/products/devices/stratix2/features/architecture/st2-adder.html I used the "Parallel Add" function in the MegaWizard to try and implement this for a Stratix II GX target. Unfortunately, it uses 2 ALMs. Does anybody know if there is a special QII setting or coding style that must be used to get the 1 ALM implementation? Thanks.Link Copied
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I just use assign "sum = a+b+c" in Verilog.
You need to be a little careful with the grouping in adder trees, matching up the bitwidths, etc. There is some discussion in this manual - www.altera.com/literature/manual/stx_cookbook.pdf www.altera.com/literature/manual/cookbook.zip![](/skins/images/D2683F18326913BBA0436CB7114DD569/responsive_peak/images/icon_anonymous_message.png)
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