8 bit counter veriloge code

[Altera_Forum]

Hello Dears, 

 pleas I need help for build and design an 8-bit synchronous counter and display the output on DE2-70 board by LEDs, 7-segments and LCD, and quatus 13.0. if there is full verilog code will be helpful.  best regards

[Altera_Forum]

why there are no body reply on me???? I am too sad

[Altera_Forum]

With all due respect, Makram, you're not asking for help, you're asking for someone to do the work for you. Try to write the code yourself and post back here if you have problems. Then the nice people here will be much more inclined to help you out.

[Altera_Forum]

Dears I designed a counter with clock_in and clock_out which display the output on Leds but I cold not display it on 7-segment, if someone have any idea for that help 

the code is :  module updowncounter (updown ,count,enable,reset,clkin,clk_out); input enable, updown; output [3:0] count= 4'b0000; reg [3:0] count; input clkin,reset; reg [32:0] count_reg=0; reg clk_out=0; output clk_out; always @ (posedge clkin) if (count_reg<10000000) count_reg <= count_reg+1; else  begin count_reg <= 0; clk_out <= ~clk_out; end always @( posedge clk_out )  if (updown && enable && reset )  count = count + 1;  else if (!updown && enable && reset) count = count -1; else if(!reset)  count = 4'b0000;  //always @ (posedge clkin)   //begin   // end endmodule  I have wrote the code of converting the counter output as below but I dont know how can i connect it in one module to display: module updowncounter (updown ,count,enable,reset,clkin,clk_out); input enable, updown; output [3:0] count= 4'b0000; reg [3:0] count; input clkin,reset; reg [32:0] count_reg=0; reg clk_out=0; output clk_out; always @ (posedge clkin) if (count_reg<10000000) count_reg <= count_reg+1; else  begin count_reg <= 0; clk_out <= ~clk_out; end always @( posedge clk_out )  if (updown && enable && reset )  count = count + 1;  else if (!updown && enable && reset) count = count -1; else if(!reset)  count = 4'b0000;  //always @ (posedge clkin)   //begin   // end endmodule

[Altera_Forum]

Makram - 

 Hi Makram -  There are some problems with your counter logic but you'll figure that stuff out over time. To drive the 7-segment display you just need to decode your 4-bit counter to generate a 7-bit vector that drives the display. This data sheet has a truth table that tells you basically what you need to do:  http://www.nxp.com/documents/data_sheet/hef4511b.pdf  I hope this helps.  Bob