A Question in regards to set_false_path

[Altera_Forum]

Hi all, 

 I've got a question about the use of set_false_path in TimeQuest Analyzer.   I understand if two clocks are totally asynchronous, I should set_false_path to them and let the analyzer not consider them.   But what if I have to clocks both generated from a PLL based on the same clock?   For example, if I've clk1 33.33Mhz used as the base clock in a PLL and it generates clka(133Mhz) and clkb(66Mhz). The frequency of clka is twice as much as that of clkb. In this case, should I set_false_path to them?

[Altera_Forum]

It's a question of how your design handles them, not necessarily their relationship. If your design only passes data between them as if they were asynchronous, then put a false path. If it passes data that needs to occur within a cycle(or multicycle), then it should be constrained that way.