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Arria10 HPS IP File missing

LinusGrun
初學者
254 檢視

Hi Professionals,


I am trying to generate my ARRIA10 SoC Development kit in Platform Designer.


When I click on the a10_hps - > System Info:

Component Instatiation: a10_hps

IP File: (NONE)


I have tried to install different kinds of Tools, Folders etc. but nothing changed.

 


Further I allways get the Warnings:

Warning: File path could not be determined for component altera_arria10_hps in C:/Projects/DLR_C10303/DLR_BSR_Modem_FPGA_P2254/Dokumentation/Software/FPGA/FPGA_BSR_Projects/BSRFPGA_SW_V10/qsys_top.qsys. The component is ignored for generation.
Warning: qsys_top.a10_hps: HPS model no longer supports simulation for HPS FPGA Bridges.
Warning: a10_hps: HPS model no longer supports simulation for HPS FPGA Bridges.
Warning: a10_hps.f2h_irq0: Cannot connect clock for irq_mapper_001.sender
Warning: a10_hps.f2h_irq0: Cannot connect reset for irq_mapper_001.sender
Warning: a10_hps.f2h_irq1: Cannot connect clock for irq_mapper_002.sender
Warning: a10_hps.f2h_irq1: Cannot connect reset for irq_mapper_002.sender


When I try to open:

ip/qsys_top/qsys_top_hps_0.ip


I get:

Error: altera_hps: couldn't read file "C:/altera_pro/25.1.1/quartus/../ip/altera/alt_mem_if/alt_mem_if_interfaces/alt_mem_if_hps_emif/common_hps_emif.tcl"
(file line 2)
invoked from within
"source "$env(QUARTUS_ROOTDIR)/../ip/altera/alt_mem_if/alt_mem_if_interfaces/alt_mem_if_hps_emif/common_hps_emif.tcl""
(file "C:/altera_pro/25.1.1/ip/altera/hps/altera_hps/altera_hps_hw.tcl" line 42)

 

 

Tools I use:

- Quartus Prime Pro 25.1.1 with Licence

- Arria 10 device Support

- EDA Libraries

 

How do you generate your a10_hps Projects?

And How do I get a valid a10_hps into the catalog?


Thanx for your help.

I am going crazy aufter 3 Weeks of trying and installing.


Greez Linus

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3 回應
sstrell
榮譽貢獻者 III
44 檢視

Have you tried deleting and re-adding the HPS IP to your Platform Designer system?

LinusGrun
初學者
28 檢視

Hi Sstrell,


thanx for your reply!


Yes, I added new Hard Processor System FPGA IP from the IP Cataloge to the Project.


I further made a new Project and only added a new Hard Processor System FPGA IP from the IP Cataloge. This I have been able to Generate HDL.


But in both cases in the arria10_hps_0 System Info there is:

Component Instantaion: arria10_hps_0 IP File: (None)

 

I realized when I start Quartus Prime the Window "Evaluation Mode" opens and says I have e.g. 17 Days remaining.

Here I choose License Setup and choose my License.

Might this be the Problem? It Starts in Evaluation Mode?


And how do I get in normal mode?

I have just installed the hole Package again... But nothing changes.


I am looking forward to your answers.

Thanx.


Linus

LinusGrun
初學者
11 檢視

Hi,


I discovered, I have the License:

Intel® Quartus® Prime Pro Edition SW-PE-QUARTUS-DKE


And this doesn't allow me to use HPS-IP.


But how to use it with a arria10 SoC Dev Kit?


Thanx

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