Avalon IP Verification Problem !!

[Altera_Forum]

Hi, 

I am new to altera's avalon IP verification. I am currently trying to test a custom IP having an avalon-st sink, an avalon-st source and an avalon-mm write slave interface. I have successfully generated testbench for my DUT with Qsys, which created BFMs for clk, rest, avalon-ST source, avalon-ST sink, and avalon-MM slave interfaces plus it generates altera_merlin_slave_translator for avalon_mm slave port. The only signals I am using with avalon-MM slave port are write, write_data and wait_request (no address signal). After writing test_program, when i try to load the design in modelsim for simulation, following error appears:  # ** fatal: (vsim-3373) . ./altera_merlin_slave_translator.sv(239): range of part_select into 'uav_address' is reversed.  Can anybody help me with this please???  regards ihtesham

[Altera_Forum]

Reviving an old unanswered thread ... 

 I want to simulate the mSGDMA core so I created a Qsys system with two mSGDMAs (one MM to ST and the other ST to MM) and tied all of the mSGDMA Avalon ports to Avalon BFMs. When I source the msim_setup.tcl script generated by Qsys in ModelSim (stand-alone ModelSim PE v10.5a, not the ModelSim included in Quartus), then run the "ld" command to compile and load the design, I get a slightly different version of the error posted above: # ** Fatal: (vsim-3373) ./../../altera_merlin_slave_translator_160/sim/altera_merlin_slave_translator.sv(250): Range of part-select [3:4] into 'real_uav_address' [3:0] is reversed.  Same file at fault (altera_merlin_slave_translator.sv). The part-select is derived from parameters that are set at instantiation. Clearly some combinations of parameter values result in an illegal [3:4] part-select. I believe this is happening on the CSR ports of the mSGDMAs where the address width is 3.  Any ideas would be appreciated.

[Altera_Forum]

Removing the Avalon-MM master BFMs from the mSGDMA ports, which don't use any address lines, got rid of the error. The descriptor ports use byte enables to select which 32-bit portion of the 256-bit descriptor is being written. As with the original poster above, not using the address port on an Avalon-MM interface causes this error. Clearly a deficiency with the Altera BFM.