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Hello all. I’m implementing a simple 5x5 8bit matrix multiplier using VHDL. I’m using DE10-lite as my FPGA and since it doesn’t have enough pins to support 3 200 bit busses, I used virtual pin assignments. I’m using SignalTap to verify my design, and I’m wondering if I can use SignalTap to assert the input data. I’ve included a screenshot of the setup tab in SignalTap. Thank you!
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Signal Tap does not assert anything. It is for monitoring only. If you want to assert signal levels during runtime (like having switches to control internal signals), use In-System Sources & Probes.
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Hi PapaPerc,
Through the signal tap doesn't possible to assert that input data. go through the bellow video you will get virtual pins selecting and monitoring the signals.
link:
Thanks,
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Virtual pins don't let you assert signal values as OP is asking about. They're just placeholders for I/O.

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