Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
公告
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17267 討論

Can't get the classic simulation to work on .vwf file

Altera_Forum
榮譽貢獻者 II
2,024 檢視

Hello, 

 

My project name is CPLD.qpf (MAX II). 

 

I created a .vwf file (OneShot.vwf) which should test a section of CPLD. There is a file named OneShot.bdf (it is part of the CPLD project) and I would like to test it. 

 

Under "Setting/Timing Analysis Setting" I selected the Use Classic option. 

Under "Setting/Simulator Setting" I chose Functional as my Simulator mode, and set OneShot.wvf as my Simulation input. 

 

I am trying to run the simulator on OneShot.vwf by clicking the "Start Simulator" button.  

 

The "Simulation Waveforms" shown is for the whole project (CPLD) and not for OneShot.vwf.  

 

What am I doing wrong here? 

 

Thanks, 

Eitan Barazani
0 積分
6 回應
Altera_Forum
榮譽貢獻者 II
757 檢視

You have to set OneShot.bdf as design top, compile it and generate a functional simulation netlist. Then you can simulate it.

Altera_Forum
榮譽貢獻者 II
757 檢視

Hi, 

 

Will it work if my OneShot is internal to the main file (CPLD.qpf) and it does not have any Input or Output Pins, i.e. it pins are of type "BURIED"? 

 

Thanks, 

Eitan
Altera_Forum
榮譽貢獻者 II
757 檢視

I don't understand the question. I suggested to set the OneShot entity as design top for test. Then it's ports aren't internal.  

 

I suggested to simulate the component alone, because you complained about seeing the waveform for the whole project.
Altera_Forum
榮譽貢獻者 II
757 檢視

Hi, 

 

Yes the ports of OneShot are internal. What I did was to create a new project just for OneShot, but I am trying to find out if this the only way? 

 

Thanks, 

Eitan
Altera_Forum
榮譽貢獻者 II
757 檢視

I suggest that you can set up other projects for your components respectively and then add the .vhd file to the top project.Maybe it helps.

Altera_Forum
榮譽貢獻者 II
757 檢視

 

--- Quote Start ---  

but I am trying to find out if this the only way? 

--- Quote End ---  

It depends on the purpose of your simulation. But I think, in most cases it means faster simulation and direct access to all nodes of interest. If you need part of the embedding design to stimulate your component in a specific way, it's different.
回覆