Compilation on quartus tool fails for encrypted verilog and verilog header files

[sneha_wagh]

Hi,

I am trying to compile the encrypted design [generated by synopsys designware core]. This design is encrypted.

Quartus tool is not able to compile this encrypted design.

Quartus Tool version used: 22.3

Below is the error displayed during compilation:

Error(13411): Verilog HDL syntax error at DW_apb_i2c_intctl.vp(1) near text ?', expecting 'class

Below are experiments done:

1] RTL files those are encrypted one had .v extension. Tried removing this and added as .vp

2] Added below code in .qsf file:

set_global_assignment -name SYSTEMVERILOG_FILE /home/projects/ace/build/ace_agib027_2023_01_05_04_43_47/design/dw_i2c/i2c/src_enc/DW_apb_i2c_intctl.vp

Still, the error is shown.

Can you guide, how to compile the encrypted design files using Quartus tool ?

Regards

Sneha

[RichardTanSY_Intel]

I assumed that the third-party tool support IEEE1735.

Does the files encrypted using the Quartus public key? File encryption with a third-party tool requires the public encryption key.

Reference: https://www.intel.com/content/www/us/en/docs/programmable/683102/21-3/support-for-the-ieee-1735-encryption.html

You may checkout this video on how-to:

https://www.youtube.com/watch?v=jr8oNk7I2SQ

Best Regards,

Richard Tan

[sneha_wagh]

Hi Richard,

I went through the document and video.  It shows how to encrypt and decrypt the design using Intel Key.

My concern is different. The third party IP is from synopsys. It is already encrypted. So the Quartus is not able to compile it.

With Xilinx Vivado, in such cases, we can launch the Synplify pro. using Vivado and then such RTL which is encrypted one can be compiled and synthesized for a specific FPGA target family. Once synthesis is done, the netlist is used further in the main flow for compilation.

So I think similar process could be there with Quartus tool but I was not able to find the same ?

Is there an option to launch the third party synthesis process with third party tool such as synplify pro and target the process for a specific Intel FPGA family ? Then I could be at-least generate the netlist and then use it in main compilation flow.

Regards

Sneha

[RichardTanSY_Intel]

Could you try to set the synthesis tool to Synplify Pro in Quartus? Go to Setting > EDA Tool Settings > Design entry/ synthesis > Synplify Pro.

Usually third party encryption tool will need Quartus public key to encrypt then the Quartus can compile it.

The documentation that I found about Synplify support:

https://www.intel.com/content/www/us/en/docs/programmable/683122/18-1/synopsys-synplify-support.html

Best Regards,

Richard Tan

[RichardTanSY_Intel]

May I know know does my latest suggestion helps?

Best Regards,

Richard Tan

p.s. Please do expert delay in response due to lunar new year.

[sneha_wagh]

Hi Richard,

I tried all the steps that you had mentioned.

The tool is not able to find where the synplify pro is located.

I do not have synplify pro license. We are checking whether can we have evaluation license to try out. IT team is working on it.

Also I had raised query related to public Key to be used on intel support platform. But they guided me that I cannot use the support platform to get the key.

To whom should I contact or can I request you to obtain the public key ?

Regards

Sneha

[sneha_wagh]

Hi Richard,

As evaluation license borrowing of Synplify is in process, I wanted to check that where we should mention in Quartus tool about this synplify tool installation path ?

https://www.intel.com/content/www/us/en/docs/programmable/683796/18-1/using-the-software-to-run-the-synplify.html 

In above document, it is mentioned that:

To set up the Intel® Quartus® Prime software to run the Synplify software, do the following:

1. On the Tools menu, click Options.
2. In the Options dialog box, click EDA Tool Options and specify the path of the Synplify or Synplify Pro software under Location of Executable.

We are using Quartus Prime Software version 22.3

I was able to see Tools menu -> Options.

But did not find out "EDA Tool Options".

Regards

Sneha

[RichardTanSY_Intel]

We have removed the EDA Tool Option GUI in Quartus Pro.

You may checkout this user guide on the Synplify* 2.2. Design Flow

https://www.intel.com/programmable/technical-pdfs/683122.pdf

Best Regards,

Richard Tan

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[RichardTanSY_Intel]

Do you need further help in regards to this case?

Best Regards,

Richard Tan

[sneha_wagh]

Hi Richard,

We can close this case.

Regards

Sneha

[RichardTanSY_Intel]

Thank you for response.

I hope that your question has been addressed, with that, I now transition this thread to community support. 

Best Regards,

Richard Tan