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Compiled Project Fails to Simulate

MasanSigi
Beginner
‎09-26-2025 07:55 PM
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Hello, I would like to ask for some guidance.
This is my first time using Intel Quartus Prime Lite to write FPGA programs. I am trying to create an 8K×9 synchronous FIFO using the IP module directly. After compilation, everything seems fine, but when I move to simulation, I encounter major issues—the waveforms do not appear at all.

Could you please advise what might be causing this problem?



SYNCFIFO8KX9.qar
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KennyTan_Altera
Moderator
‎09-28-2025 06:58 PM
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Hi,


Can you try out our example design first? https://www.intel.com/content/www/us/en/docs/programmable/703090/21-1/simulation-quick-start.html


It will help you to understand the full flow of the simulation.


Thanks,

Best regards,

Kenny Tan


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