Constraint file in Quartus

[Altera_Forum]

Hello everyone, 

 how could I add some timing constraints and IOB constraints in Quartus II v13.0 SP1?  Last month I was working with ISE and some Xilinx tools and I expected that Altera has also a ucf file, but I didn't find anything about this file. I read something about the .sdc but I suposse this is a bit different from ucf (but I am not sure).  How could I find the syntaxis for add timing constraints (declaring a CLK) and declare the pins I will use (this is made by the Pin Planner only??)  Thanks in advanced, Omar

[Altera_Forum]

you are a bit late for even xilinx vivado has moved to xdc file instead of UCF. 

Altera moved earlier than xilinx from classic tool to sdc style.  you need sdc file for timing constraints. Read examples in altera's Timequest resource centre

[Altera_Forum]

A bit tips for the contraint, you can actually right click on the sdc file to start do the constraining.

[Altera_Forum]

I found out this link is useful for timing constraint https://www.altera.com/support/support-resources/design-examples/design-software/timequest/sof-qts-timequest.html. For beginner, you can follow this user guide to walk through the different type of constraints https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/qts/qts_qii53018.pdf