Conversion VHDL <> Verilog

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Conversion VHDL <> Verilog

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Hi!

I need your help to find which VHDL <> Verilog tool is the most reliable: open source or not.

I need of course to test these tools (evaluation version if not free).

That's why I ask you so I don't loose time with something that is already known to be thrown away.

I did a quick search which led me to this conclusion:

There is x-tekcorp and x-hdl both with a license to purchase but the general idea out there is that x-hdl is the best, the others are just toys !

Is this correct?

Thank you.

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