Convert programming files

[Altera_Forum]

Have anyone else had any trouble with converting programming files in Q9.1? 

It worked OK for me in Q9.0sp2 but in the new version my FPGA doesn't configure. I went back to the convert programming files in Q9.0 and used the .sof created by Q9.1 and that worked OK too.  Also I could use the .sof created by Q9.1 in jtag mode to configure my FPGA, it just seems to be the convert programming files in Q9.1 that I'm having trouble with.  Any ideas?

[Altera_Forum]

recompile your top level_entity in a new project,maybe it works again in 9.1 version. 

good luck.

[Altera_Forum]

I'v met the same problem.

[Altera_Forum]

--- Quote Start ---  Have anyone else had any trouble with converting programming files in Q9.1? It worked OK for me in Q9.0sp2 but in the new version my FPGA doesn't configure. I went back to the convert programming files in Q9.0 and used the .sof created by Q9.1 and that worked OK too.  Also I could use the .sof created by Q9.1 in jtag mode to configure my FPGA, it just seems to be the convert programming files in Q9.1 that I'm having trouble with.  Any ideas?  --- Quote End ---    in what kind of file do you try to convert the sof file ?  Kind regards  GPK

[Altera_Forum]

I'm using one e2prom to configure 2 FPGAs so I take the sofs for the 2 FPGAs and convert them into a single pof which I use to program my e2prom. 

 Ben

[Altera_Forum]

I also have problem with programming files. 

 I've noticed that sof2flash tool from 9.0 and 9.1 produce different results from the same SOF file. See thread "EPCS booting problem" for more details ...   So it certainly looks like there's something badly broken in the programming file conversion tools of Q9.1 ...   Regards, Jari

[Altera_Forum]

Altera's advice was :- 

please try to turn on the “disable as mode conf_done error check” option from the bitstream generation advanced option utility. you can open this dialog box from “convert programming file” window in the quartus ii software by clicking on the “advanced” button. after that, generate a compress or uncompress .pof/.jic file, then try to program them into the epcs to verify if the fpga would be configure or not.  This has done the trick for me and my FPGA now configures again!