ALTPLL in Mega Wizard

[Altera_Forum]

Hi, 

I generated a PLL using Mega Wizard. It creates a clock with 50MHz and 5% duty cycle. I need to increase the duty cycle from the top level entity using a loop. In the PLL code duty cycle is defined under Generics as a type - NATURAL.   How can I pass value from top level entity to PLL code. (The only way I know is to define a signal and pass it - it didn't work due to type variation):confused:

[Altera_Forum]

Generics are constant parameters, they can't be connected to signals. Furthermore, a PLL's frequency or duty cycle isn't easily variable at runtime, only possible through PLL reconfiguration. Read the respective device manual for hardware features available with your FPGA family.