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module simple_circuit(F,A):
input [0:3]A:
output [0:1]F;
assign F[0] = A[0] || A[1]&&A[2] || A[1]&&A[3];
endmodule
Then I used University Program VWF,
Insert the node, and choose A as count value signal, it crash.
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Hi,
You can't use count value "count every" on bundled signals in vector waveform simulator. That only works on single bit signal. Check image:
Thanks,
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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below is my teacher vedio,
https://youtu.be/LaQi-nPfRx0
I do the same thing (06:22),but crash
Beacause my teacher success,I thnik it might be ok in earlier version
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Hi,
The function worked well in older version Quartus II. Tested in Quartus II 15 and 13. Quartus II 13 is still downloadable in FPGA Software Download Center. As vwf is generally older version simulator for Quartus II. For Quartus Prime, it's recommended to use modelsim/questasim simulator for more functionality.
Thanks,
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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I got it, thank you.
Best regards,
MINGYOU
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