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Crash while compiling simple project for MAX V.


I'm starting a new project, and did a simple top file.

When I try to compile it I get a crash error.

The report:

Problem Details Error: Internal Error: Sub-system: FYGR, File: /quartus/fitter/fygr/fygr_cdr_op.cpp, Line: 2875 source_oterm != NULLFitter pre-processing Stack Trace: 0x166916: FYGR_CDR_OP::emulatedLVDS_create_complementary_pin + 0x966 (fitter_fygr) 0x2ab39: FYGR_EXPERT::fitter_preparation + 0x6b9 (fitter_fygr) 0x23860: FYGR_FITCC_FAMILY_EXPERT::fitter_preparation + 0x40 (fitter_fygr) 0x557a1: FITCC_EXPERT::fitter_preparation + 0x1f1 (FITTER_FITCC) 0x56116: FITCC_EXPERT::invoke_fitter + 0x396 (FITTER_FITCC) 0x23af6: fygr_execute + 0x1a6 (fitter_fygr) 0xe910: fmain_start + 0x900 (FITTER_FMAIN) 0x41b1: qfit_execute_fit + 0x1bd (comp_qfit_legacy_flow) 0x5384: QFIT_FRAMEWORK::execute + 0x2a0 (comp_qfit_legacy_flow) 0x267f: qfit_legacy_flow_run_legacy_fitter_flow + 0x1c7 (comp_qfit_legacy_flow) 0x14410: TclInvokeStringCommand + 0xf0 (tcl86) 0x161e2: TclNRRunCallbacks + 0x62 (tcl86) 0x17a65: TclEvalEx + 0xa65 (tcl86) 0xa6f8b: Tcl_FSEvalFileEx + 0x22b (tcl86) 0xa5646: Tcl_EvalFile + 0x36 (tcl86) 0x12606: qexe_evaluate_tcl_script + 0x376 (comp_qexe) 0x11864: qexe_do_tcl + 0x334 (comp_qexe) 0x16755: qexe_run_tcl_option + 0x585 (comp_qexe) 0x380c3: qcu_run_tcl_option + 0x1003 (comp_qcu) 0x160aa: qexe_run + 0x39a (comp_qexe) 0x16e51: qexe_standard_main + 0xc1 (comp_qexe) 0x2233: qfit2_main + 0x73 (quartus_fit) 0x12e98: msg_main_thread + 0x18 (CCL_MSG) 0x1467e: msg_thread_wrapper + 0x6e (CCL_MSG) 0x16660: mem_thread_wrapper + 0x70 (ccl_mem) 0x12761: msg_exe_main + 0xa1 (CCL_MSG) 0x287e: __tmainCRTStartup + 0x10e (quartus_fit) 0x14033: BaseThreadInitThunk + 0x13 (KERNEL32) 0x73690: RtlUserThreadStart + 0x20 (ntdll)   End-trace     Executable: quartus_fit Comment: None   System Information Platform: windows64 OS name: Windows 10 OS version: 10.0   Quartus Prime Information Address bits: 64 Version: 18.1.0 Build: 625 Edition: Lite Edition


Tried googling it, and I don't get any information.

I never used an FPGA of this family.

I think the problem might be somewhere in the assigment of the pins.

Namely of the differential ones, because if i comment them it compiles without any crashes.

In previous designs with different devices, I used the primitive ALT_OUTBUF_DIFF whenever i need to output LVDS, but now it tells me it is not supported.

I tried using the megafunction ALTLVDS_TX, with a deserialization of 1 but the crash is still there.


These are the assignments:

set_global_assignment -name FAMILY "MAX V" set_global_assignment -name DEVICE 5M160ZE64A5 set_global_assignment -name TOP_LEVEL_ENTITY MAXV_i2c_top set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:56:31 APRIL 07, 2020" set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40" set_global_assignment -name MAX_CORE_JUNCTION_TEMP 125 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 64 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" set_location_assignment PIN_7 -to clock set_location_assignment PIN_2 -to reset set_location_assignment PIN_5 -to i2c_sda set_location_assignment PIN_10 -to i2c_scl set_location_assignment PIN_18 -to data_out[0] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[0] set_location_assignment PIN_19 -to "data_out[0](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[1] set_location_assignment PIN_20 -to data_out[1] set_location_assignment PIN_21 -to "data_out[1](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[2] set_location_assignment PIN_22 -to data_out[2] set_location_assignment PIN_24 -to "data_out[2](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[3] set_location_assignment PIN_26 -to data_out[3] set_location_assignment PIN_27 -to "data_out[3](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[4] set_location_assignment PIN_30 -to data_out[4] set_location_assignment PIN_31 -to "data_out[4](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[5] set_location_assignment PIN_32 -to data_out[5] set_location_assignment PIN_33 -to "data_out[5](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[6] set_location_assignment PIN_35 -to data_out[6] set_location_assignment PIN_34 -to "data_out[6](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[7] set_location_assignment PIN_37 -to data_out[7] set_location_assignment PIN_36 -to "data_out[7](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[8] set_location_assignment PIN_44 -to data_out[8] set_location_assignment PIN_43 -to "data_out[8](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[9] set_location_assignment PIN_47 -to data_out[9] set_location_assignment PIN_46 -to "data_out[9](n)" set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[10] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[11] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[12] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[13] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[14] set_instance_assignment -name IO_STANDARD LVDS_E_3R -to data_out[15] set_location_assignment PIN_50 -to data_out[10] set_location_assignment PIN_49 -to "data_out[10](n)" set_location_assignment PIN_53 -to data_out[11] set_location_assignment PIN_52 -to "data_out[11](n)" set_location_assignment PIN_55 -to data_out[12] set_location_assignment PIN_54 -to "data_out[12](n)" set_location_assignment PIN_58 -to data_out[13] set_location_assignment PIN_56 -to "data_out[13](n)" set_location_assignment PIN_60 -to data_out[14] set_location_assignment PIN_59 -to "data_out[14](n)" set_location_assignment PIN_63 -to data_out[15] set_location_assignment PIN_61 -to "data_out[15](n)" set_instance_assignment -name IO_STANDARD "2.5 V" -to clock set_instance_assignment -name IO_STANDARD "2.5 V" -to i2c_scl set_instance_assignment -name IO_STANDARD "2.5 V" -to i2c_sda set_instance_assignment -name IO_STANDARD "2.5 V" -to reset set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS OFF set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL set_global_assignment -name SDC_FILE MAXV_i2c.sdc set_global_assignment -name VERILOG_FILE MAXV_i2c_top.v set_global_assignment -name VERILOG_FILE i2c_control.v set_global_assignment -name DEVICE_MIGRATION_LIST 5M160ZE64A5 set_global_assignment -name QIP_FILE LVDS_TX.qip

What do you think I might be doing wrong?




0 Kudos
5 Replies

Can you use the latest release of Quartus Prime 19.1?


Do you have a bunch of output ports that are stuck GND  and had assigning to an LVDS I/O standard?




Any update?


Hi Kenny, sorry for not answering sooner.

It is not solved. However, in the end the output were not suppose to be LVDS (miscommunication with my team). I change them to single ended (LVTTL 3.3), and the crash stoped.





Yes, this problem occur because of the LVDS I/O standard was assign incorrectly. It was suppose to give an error rather than crash. I will file a documentation/kdb on this.


I'm having similar issues on a MAX V 5M160ZE64I5 device. I can compile and fit a design when I assign an output pin on bank 2 to 2V5. When I change it to LVDS_E_3R Quartus crashes. I'm using Quartus 20.1 Lite. I'm assigning the pin (txdata) in the pin planner to pin 37 (positive diff pair pin) and when I set it to LVDS_E_3R the pin planner creates the txdata(n) pin on pin 36 which is correct. It sets the IO Standard to LVDS_E_3R. Then when I go back into Quartus and compile it I get the "Sorry! The Quartus Prime software quit unexpectedly." dialog box.

Any ideas? I've only been using Intel devices on this project, previously I have been using the X devices so I'm not sure if it's something I'm doing as a Quartus newb or this is actually a bug.


Problem Details
Internal Error: Sub-system: FYGR, File: /quartus/fitter/fygr/fygr_cdr_op_place.cpp, Line: 1930
get_io_mgr()->is_insertion_legal(atom, dev_pad_id)Fitter pre-processing
Stack Trace:
   0x17f41b: FYGR_CDR_OP::place_atom_at_gid + 0x29b (fitter_fygr)
   0x16a278: FYGR_CDR_OP::emulatedLVDS_placer + 0xc78 (fitter_fygr)
    0x2abef: FYGR_EXPERT::fitter_preparation + 0x6ff (fitter_fygr)
    0x238c0: FYGR_FITCC_FAMILY_EXPERT::fitter_preparation + 0x40 (fitter_fygr)
    0x55a73: FITCC_EXPERT::fitter_preparation + 0x203 (FITTER_FITCC)
    0x56414: FITCC_EXPERT::invoke_fitter + 0x3b4 (FITTER_FITCC)
    0x23b56: fygr_execute + 0x1a6 (fitter_fygr)
     0xeeab: fmain_start + 0x8eb (FITTER_FMAIN)
     0x4387: qfit_execute_fit + 0x1d3 (comp_qfit_legacy_flow)
     0x55e0: QFIT_FRAMEWORK::execute + 0x2b4 (comp_qfit_legacy_flow)
     0x2768: qfit_legacy_flow_run_legacy_fitter_flow + 0x1d4 (comp_qfit_legacy_flow)
    0x14410: TclInvokeStringCommand + 0xf0 (tcl86)
    0x161e2: TclNRRunCallbacks + 0x62 (tcl86)
    0x17a65: TclEvalEx + 0xa65 (tcl86)
    0xa6f8b: Tcl_FSEvalFileEx + 0x22b (tcl86)
    0xa5646: Tcl_EvalFile + 0x36 (tcl86)
    0x12877: qexe_evaluate_tcl_script + 0x367 (comp_qexe)
    0x11ac3: qexe_do_tcl + 0x343 (comp_qexe)
    0x16c34: qexe_run_tcl_option + 0x584 (comp_qexe)
    0x39285: qcu_run_tcl_option + 0xf95 (comp_qcu)
    0x1658d: qexe_run + 0x39d (comp_qexe)
    0x17371: qexe_standard_main + 0xc1 (comp_qexe)
     0x2262: qfit2_main + 0x82 (quartus_fit)
    0x13258: msg_main_thread + 0x18 (CCL_MSG)
    0x14a5e: msg_thread_wrapper + 0x6e (CCL_MSG)
    0x16af0: mem_thread_wrapper + 0x70 (ccl_mem)
    0x12af1: msg_exe_main + 0xa1 (CCL_MSG)
     0x2a02: __tmainCRTStartup + 0x10e (quartus_fit)
    0x17033: BaseThreadInitThunk + 0x13 (KERNEL32)
    0x4cec0: RtlUserThreadStart + 0x20 (ntdll)

Executable: quartus_fit

System Information
Platform: windows64
OS name: Windows 10
OS version: 10.0

Quartus Prime Information
Address bits: 64
Version: 20.1.1
Build: 720
Edition: Lite Edition