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15317 Discussions

Creating my own interface standard

Altera_Forum
Honored Contributor II
818 Views

Hi, 

 

I want to do an FPGA project, and for this "rather than using USB" id like to see if I can do a custom serial interface standard. 

The main reason being, I dont want to deal with handshakes and pull up resistors or slow things down using a UC. 

This is a verilog project, but Im more along the lines of using the computer to interface a GUI. 

 

To give an idea of what I was thinking is to use a data bit, followed by a latch bit. So you get state, latch, state, latch on two wires. 

Its no prob. if the interface is unidirectional going to the FPGA. 

I was hoping to do this from Visual Basic.net but I can use some MASM to do this. 

 

Hopefully somebody can help me out by saying hack into this or use this to create such an interface. 

 

Regards,
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3 Replies
Altera_Forum
Honored Contributor II
80 Views

Use something standard. It's standardised for a reason and IP is already available.  

 

Have you thought about pcie or srio? Or even Ethernet?
Altera_Forum
Honored Contributor II
80 Views

Remember an interface has (at least) two ends to it, the transmitter and the receiver. So you need to implement your custom protocol at each end. If you are going to run it between two FPGA end points, the pretty much you can do whatever you want. But if you expect one end will be on a standard windows/linux PC, then the options get much more limited to interfaces supported on existing hardware. Like RS232 serial, ethernet, I2C (maybe), SPI (maybe), USB, FireWire. 

 

So if your intent is to research new serial interface protocols, then that is one thing. But if you just need a serial interface as part of a larger project, then Tricky has the best suggestion.
Altera_Forum
Honored Contributor II
80 Views

Yes, I'm no expert at anything interface standard to say the least. 

 

Actually I have an Arduino DUE collecting dust. All in all it's stupidly simple to settle for that part on the GUI,  

Or do a bare wire interface to the FPGA from there.  

 

http://forum.arduino.cc/index.php/topic,131872.0.html 

 

 

 

Thanks!
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