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Altera_Forum
Honored Contributor I
782 Views

Custom Instruction accessing SDRAM

Hello 

 

I am currently trying to update a memory location content inside SDRAM from a custom instruction(function called from nios ii). From what I understand, I need to use avalon memory mapped interfaces. 

 

tried the following implementation below, but would not get it to work. is there something that I missed out or misinterpreted? 

 

inside QSYS the custom instruction having a MM master connected to SDRAM MM slave, and for the custom instruction side, a template for avalon mm simple master is being added with a portion of the codes included for custom instruction. 

//avalon MM Master port input clock, reset; output reg avalon_master_address; output avalon_master_byteenable; output reg avalon_master_read; input avalon_master_readdata; input avalon_master_response; input avalon_master_waitrequest; //not used output reg avalon_master_write; output reg avalon_master_writedata; assign avalon_master_byteenable = 4'b1111; always@(posedge clk) begin if(clk_en) begin if(start) begin case(n) 2 : begin avalon_master_address <= addressA; avalon_master_writedata <= dataB; avalon_master_read <= 1'b0; avalon_master_write <= 1'b1; if(avalon_master_response == 2'b00) n2_done <= 1'b1; end end end end end  

 

Thanks in advance
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2 Replies
Altera_Forum
Honored Contributor I
27 Views

Why do you need a custom instruction for this? And the code you post is not complete. It's not clear what n and n2_done are. 

 

If you are trying to implement a state machine, I suggest following the state machine template.
Altera_Forum
Honored Contributor I
27 Views

Plus, this is not how you construct a Nios custom instruction. There are certain ports you need to use (not standard Avalon) and you connect it to the Nios's custom instruction master interface. See this online training: 

 

https://www.altera.com/support/training/course/oniicus.html
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