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Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Custom Processor CusP

Altera_Forum
Honored Contributor II
4,351 Views

Where is documentation to the sources file of cusp (cusp-engine-tests.jar\src\... ).

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27 Replies
Altera_Forum
Honored Contributor II
2,734 Views

i don't think its public, what are you trying to do?

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Altera_Forum
Honored Contributor II
2,734 Views

It's not documented for a reason..... hint you don't want to be poking around in there.

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Altera_Forum
Honored Contributor II
2,734 Views

Because CusP is a better tool than SoPC and Qsys.

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Altera_Forum
Honored Contributor II
2,734 Views

how did you arrive at that conclusion? if you look around the forum you'll find that cusp isn't supported and that Altera is porting cusp IP to HDL

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Altera_Forum
Honored Contributor II
2,734 Views

CusP and SOPC Builder/Qsys have different purposes so it's a bit odd to even compare them. CusP is only on the ACDS for legacy reasons, it is not being maintained so I wouldn't recommend using it.

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Altera_Forum
Honored Contributor II
2,734 Views

But Quartus recognizes CusP component and compiles.

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Altera_Forum
Honored Contributor II
2,734 Views

CusP component is working, I tested on DE0 Nano. 

example: cusp_test4.c 

 

# include <alt_cusp.h> 

SC_MODULE(cusp_test4) 

ALT_GPO<sc_bv<8>> led; 

 

void behaviour() 

int state = 0; 

 

while(1) 

for (state = 0; state <= 0xfff; state++) { 

 

if (state == 0x1fff) 

led.write(1); 

else if (state == 0x3ff) 

led.write(2); 

else if (state == 0x5ff) 

led.write(4); 

else if (state == 0x7ff) 

led.write(8); 

else if (state == 0x9ff) 

led.write(16); 

else if (state == 0xbff) 

led.write(32); 

else if (state == 0xdff) 

led.write(64); 

else if (state == 0xfff) 

led.write(128); 

 

SC_CTOR(cusp_test4) 

SC_THREAD(behaviour); 

}; 

};
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Altera_Forum
Honored Contributor II
2,734 Views

Use at your own risk then (no support, documentation, etc..) It's typically not a good idea to rely on unsupported features especially when the vendor is moving away from those same features.

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Altera_Forum
Honored Contributor II
2,734 Views

Documentation is not needed, I compiled a new "CusP (no_lic)", everything is in the "cusp-engine-tests.jar". Altera make the mistake of not doing support for "CusP".

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Altera_Forum
Honored Contributor II
2,734 Views

Full circle to my first post, there is a reason why it's not documented or supported.... It was experimental and wasn't persuded any further. I wouldn't recommend using for production since who knows how long it'll work for (or if it will even remain in the tools).

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Altera_Forum
Honored Contributor II
2,734 Views

I have a question, also for Altera, if there is no documentation and support it would be possible to share this on open-source license.

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Altera_Forum
Honored Contributor II
2,734 Views

Since CusP isn't open source licensed I wouldn't attempt to do so. The HDL output from the tool you can make available.

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Altera_Forum
Honored Contributor II
2,734 Views

Not what I meant. 

"Altera" there is no documentation and support for users. 

Does the "Altera" may provide the source code and documentation on the open-source license.
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Altera_Forum
Honored Contributor II
2,734 Views

Since it was internally developed and never offered as a product the answer is no it cannot be offered under an open source license. You can try asking your FAE to see if they can make a request but I don't think you'll get a different answer.

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Altera_Forum
Honored Contributor II
2,734 Views

if you're interested in open source, have you thought about trying or contributing to myHDL?

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Altera_Forum
Honored Contributor II
2,734 Views

Please give me an email to FAE. 

To write simple programs, only need to me a verilog or vhdl. 

To write something more difficult, is needed a "hardware accelerator", "myHDL"is not suitable. 

I am currently writing a "Cellular Neural Networks (CNN)" program in the "CusP".
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Altera_Forum
Honored Contributor II
2,734 Views

It turns out that, I do not have adequate competence to ask such questions on "CusP" and "eperl.exe" error (the human factor). This means that I know how to decode the files "*.epl (generate_rtl.epl) ". Maybe if I wrote on the forum how to do it, someone from Altera to finally talk to me.

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Altera_Forum
Honored Contributor II
2,734 Views

Hi.  

I am new user on this forum, and not very spike to english, I am polish. 

To "goeth": I would like to know about the cusp.
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Altera_Forum
Honored Contributor II
2,734 Views

Wi&#281;c pogadamy po polsku, bo w sumie ja te&#380; dobrze nie znam angielskiego. 

Pewnie chcia&#322;by&#347; si&#281; czego&#347; dowiedzie&#263; na temat programu "cusp" to skrót od Custom Processor czyli ten program z komponentu opisanego w j&#281;zyku SystemC generuje ten komponent w j&#281;zykach vhdl lub verilog w archtekturze tak zwanej ASIP (Application Specific Instruction set Processor) w pisz w google to co w nawiasie to co&#347; znajdziesz na temat tej architektury. A konkretnie dokumentacji odno&#347;nie tego programu to nie znalaz&#322;em ale znalaz&#322;em dwie publikacje s&#261; w za&#322;&#261;czniku, w j&#281;zyku angielskim. Je&#347;li wolno spyta&#263; to co konkretnie chcesz napisa&#263;.
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Altera_Forum
Honored Contributor II
2,668 Views

Kudos for reverse engineering CusP. Yeah you're not going to get anything from Altera on this. But Mentor has a C->Hardware tool that Altera considered using to replace CuSP (Catapult-C I think). Definitely not free though.

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