Cyclone II SDRAM connectivity

[Altera_Forum]

Hi - thanks in advance for reading.  

 I'm trying to load the count_binary program onto the Cyclone II board using Nios II; I've received several errors, the most common being:  Using cable "USB-Blaster ", device 1, instance 0x00 Pausing target processor: OK Initializing CPU cache (if present) OK Downloading 02000000 ( 0%) Downloaded 61KB in 1.0s (61.0KB/s) Verifying 02000000 ( 0%) Verify failed between address 0x2000000 and 0x200F37F Leaving target processor paused   I've also seen the following:   Hardware simulation is not enabled for the target SOPC Builder system. Skipping creation of hardware simulation model contents and simulation symbol files. (Note: This does not affect the instruction set simulator.)  as well as a win32 error 487.   This is an intro course and I'm not very familiar with troubleshooting techniques; any tips would be awesome. Thanks again :)

[Altera_Forum]

The second message regarding hardware simulation is irrelevant I believe. 

 Your first problem is the larger problem. It would indicate that your interface to the SDRAM is not working properly. Either SDRAM is not connected properly or that you are not meeting timing requirements.  Which board exactly are you using?  Are you using an FPGA project that you created or one that came with the board?  Jake

[Altera_Forum]

Thanks Jake. I'm using the Cyclone II EP2C35F672C6. I'm using the count_binary project from the sample verilog projects folder; the code hasn't been modified at all.

[Altera_Forum]

Quick update: I'm getting the following error when "Include Small C Library" is checked in the project's System Library Properties: 

  make -s all includes Compiling count_binary.c... Linking count_binary_0.elf... obj/count_binary.o(.text+0x434): In function `main': ../count_binary.c:332: undefined reference to `fopen' collect2: ld returned 1 exit status make: *** Error 1   This assignment's instructions say to include the small C library, but whether or not it's included, we get errors.