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Hi people,
I am planning to use the Audio Codec in the DE2 Altera board. I have already found the demo project DE2_Audio_Example file from Altera site but it is in verilog. I am desperately looking for the VHDL version of it if there is one. And out of curiosity why are all Altera demos in Verilog.....I find VHDL to be more powerful at least to have a version of itself for every demo. Thanks! Best,Link Copied
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Try to watch in Pong P. Chu "Embedded SoPC Design with Nios II Processor and VHDL Examples"
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