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Hello,
I am trying to generate a DisplayPort example and keep getting an error message, attached. I also am including the settings I am using for the IP. I cannot see what the error message is talking about as I have Synthesis selected as VHDL Simulation does not seem to be supported (as far as I can tell) in Quartus. Any help would be appreciated.
Thank you,
Drew
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Hi Drew,
Thank you for reaching out.
Apologize for the delayed response as we encounter some technical difficulty.
Just to let you know that Intel has received your support request and currently we are confirming the details with our internal team.
I shall come back to you with findings.
Thank you for your patience.
Best Regards,
ZH_Intel
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Hello,
Thank you for letting me know. I will wait.
Drew
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Hi Drew,
Good day.
Thank you for your patience.
For DisplayPort IP, the are a number of design example available to choose from, you may refer to below table:
I have tested with the same settings that you use, and I observe there are some setting that you need to turn on in order to enable the design example.
You may enable/disable the settings as mentioned in above table in order to allow the design example to appear on the "select design" option under the available design example tab in IP Parameter Editor.
Allow me to clarify some items below:
Q1. Did you able to see the design example option appear in IP parameter editor as below?
Q2. May I know which design example that you intent to use?
Q3. May I know which operating system and, Quartus version you are using?
Looking forward to hear back from you so that we can proceed for next step.
Thank you.
Best Regards,
ZH_Intel
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Hello,
Yes, I can see the Design Example tab appear.
I want to be able to do both RX and TX. I think though that I am trying to generate a single file that does both at the same time. I might have been trying to think of it like a I2C bus that is bidirectional.
I am using Windows 11 V. 23H2 and Quartus 23.4.
Thank you,
Drew
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Hi Drew,
Good day.
Thank you for your reply.
Glad that you are able to see the design example. If you wish to have a TX-RX design, you may use choose either "DisplayPort SST parallel loopback without PCR" or "DisplayPort SST parallel loopback with AXIS Video Interface" design depending on your desired application.
Below is the example design user guide for your reference:
F-Tile DisplayPort Intel® FPGA IP Design Example User Guide
Hope this answer was helpful.
With that, do you still have further inquiries on this case?
Is there anything else I can help you with regards to this case?
Thank you.
Best Regards,
ZH_Intel
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Hello,
I will do that. I do not see the guide you are speaking of in the message:
Perhaps a glitch? Assuming everything works though, I will not need any more help with this matter.
Thank you,
Drew
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Hi Drew,
Good day.
Thank you for your reply.
Yes, I believe so. I think the link might not be updated when I post my reply.
I have already re-insert the link on the previous message.
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.
Stay safe, and I hope you have a great day.
Thank you.
Best Regards,
ZH_Intel
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Hello,
Thank you for letting me know, I will fix my issues.
Drew
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