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Hi,I'm using modelsim in quartus prime 19.1 pro version where I used the AVALON-MM PCIe HARD IP from IP catalog and generated an example design.Now,while I'm running the test bench file,it's popping up an error message saying
# Fatal error in file $MODEL_TECH/../altera/verilog/src/mentor/ct1_hssi_atoms_ncrypt.sv
Can anyone help me out
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can you share the step on how you generate the example design and step for you to run the simulation?
I tried to run the simulation using Q191 and modelsim_se2019.2 and I can run the simulation successful.
The step i used:
generate the example design, open modelsim and cd into pcie_example_design_tb\pcie_example_design_tb\sim\mentor
source msim_setup.tcl
ld_debug
add simulation waveform
run -all
and here is the end of its transcript:
# INFO: 77264 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 77840 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 78424 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 79008 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 79600 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 80184 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 80752 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 81320 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 81888 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 82456 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# SUCCESS: Simulation stopped due to successful completion!
# Simulation passed
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