Hi everyone,
I am using MAX 10 FPGA (10M02SCU169C8G) for a project and I require some of the I/Os to have a weak pull up resistor. In order to set the weak pull up resistor, the process that I have been following is as follows:
Assignments-> Assignment Editor
In the "To" column I enter the Net Name (for e.g. CONTROLLER_ENABLE_OUTPUT). Then in the "Value" column I select the parameter "Weak Pull-Up Resistor" from the drop down list. After that I select the "YES" option from the drop down in the "Enable" column.
But even then it turns out that sometimes the pull-ups are not enabled in the pin after following the above mentioned process. On doing further research I discovered a setting that I haven't been using till now. The so mentioned setting is located at:
Assignments-> Settings -> Compiler Settings -> Advanced Settings (Fitter) ->Weak Pull-Up Resistor option
The above option was found out to be Off as per the default setting. Should I enable this setting for the pull up to work.
Also Is there any other way to enable the pull up resistor using Pin Planner or by applying some constraints in the code? And is the process that I follow the correct procedure to enable pull up? I am using Quartus Prime Ver. 16.0.2.
Tanks in advance.
Regards,
Deepak
