I'm making a design with a Cyclone IV EP4CE22F17 (256 pin FPGA).
It should have 153 user I/O (Although Quartus 9.1 SP2 says 154), and I need them all 153.
In PS mode, that is possible. Only DCLK, which is the 154th pin in Quartus, is dedicated.
In AS mode, I'm not able to assign more than 150 pins, although I set all the dual purpose pins as "use as regular I/O". A note in the handbook says:To tri-state AS configuration pins in the AS configuration scheme, turn on the
enable input tri-state on active configuration pins in user mode option from the Device and Pin Options dialog box. This tri-states DCLK, nCSO, Data[0], and Data[1]/ASDO pins. Dual-purpose pins
settings for these pins are ignored. To set these pins to different settings, turn off the
enable input tri-state on active configuration pins in
user mode option and set the desired setting from the Dual-purpose Pins Setting menu.
But I can't find the option
enable input tri-state on active configuration pins in user mode in Quartus II (9.1 sp2). Checking the Altera site, there is mentioned to add
set_global_assignment -name tri_state_spi_pins on to the .qsf-file for Quartus II V10, but that gives an error when starting Quartus II V9.1.
Any ideas?
Can I only use the mentioned set_global_assignment..... in QuartusII, version 10?
Are there other ways to use the configuration pins in AS-mode as user I/O?
Thanks, Ton
