Error when compiling dpc++ for fpga

[KatariTF]

I try compile oneAPI_samples to fpga but send me a error: 

Error: qsys script failed! See bin/bitstream/hough_transform_live.fpga.prj/quartus_sh_compile.log for details.

4:41:50 Error: set_project_property DEVICE AGFB014R24A2E2V: The device AGFB014R24A2E2V is unknown.
llvm-foreach:
icpx: error: fpga compiler command failed with exit code 1 (use -v to see invocation)

quartus_sh_compile.log

4:41:50 Error: set_project_property DEVICE AGFB014R24A2E2V: The device AGFB014R24A2E2V is unknown.
2024.05.17.14:41:50 Info: add_instance hough_transform_live_fpga_di_inst hough_transform_live_fpga_di
2024.05.17.14:41:50 Info: set_instance_property hough_transform_live_fpga_di_inst AUTO_EXPORT true
2024.05.17.14:41:50 Info: save_system top_hough_transform_live_fpga_di.ip

[BoonBengT_Altera]

Hi @KatariTF,

Thank you for posting in Intel community forum and hope all is well.

Noted on the error, would you be able to share the URL of the example design you are trying to build with?

Also is it correct to assume that you are trying to build in the Intel DevCloud platform based on the screenshot?

Hope to hear from you soon. 

Best Wishes

BB

[KatariTF]

Hello @BoonBengT_Altera ,

I'm trying to use fpga with Intel devCloud but, I didn't succeed. I also tried with vector_add but I had same error.

URL: https://github.com/avirup247/WaterLeadLevelPredictor/tree/master/Hough_Transform_on_FPGAs_Using_oneAPI

Second cuestion: Yes, i do.

[BoonBengT_Altera · Accepted solution]

Hi @KatariTF,

Noted with thanks on the repository, however the mention example design are from the open community. With limited ownership and access, hence we could only provide best effort support on the mention design.

Looking at the repo details it mentioning the hardware support are just limited to Stratix or Arria. Hence entering Agilex devices may cause an error. Hence would suggest perhaps to try compiled with the mention support devices. More details on the devices compilation flags can be found in the following link below:

- https://www.intel.com/content/www/us/en/docs/oneapi/programming-guide/2023-2/fpga-compilation-flags.html

Hope that clarify.

Best Wishes

BB

[BoonBengT_Altera]

Hi @KatariTF,

Great! Good to know that your doubts has been clarify, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

Thank you for the questions and as always pleasure having you here.

Best Wishes

BB

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.