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BPani1
Beginner
890 Views

Ethernet ping issue with Arria 10 Development Kit

Hi ,

I am using quartus prime-18.1 version and Arria 10 Development kit(Serial Number:10APCIe0002691) .

I am trying to ping the ethernet from the host which is connected one to one.

I have assigned the static ip on both.

I am not able to ping the board from host.Please let me know if any one found any issue.Below is the console log.Also i am attaching the NIOS software code with this.

 

Console log:

InterNiche Portable TCP/IP, v3.1 

 

Copyright 1996-2008 by InterNiche Technologies. All rights reserved. 

altera_eth_tse_init 0

prep_tse_mac 0

Inside get_mac_addr 

Inside get_ip_addr function 

Static IP Address is 192.168.5.4

prepped 1 interface, initializing...

tse_mac_init 0

List of PHY profiles supported (Total profiles = 5)...

Profile No. 0  :

PHY Name    : Marvell 88E1111

PHY OUI     : 0x005043

PHY Model Num. : 0x0c

PHY Rev. Num.  : 0x02

Status Register : 0x11

Speed Bit    : 14

Duplex Bit   : 13

Link Bit    : 10

 

Profile No. 1  :

PHY Name    : Marvell Quad PHY 88E1145

PHY OUI     : 0x005043

PHY Model Num. : 0x0d

PHY Rev. Num.  : 0x02

Status Register : 0x11

Speed Bit    : 14

Duplex Bit   : 13

Link Bit    : 10

 

Profile No. 2  :

PHY Name    : National DP83865

PHY OUI     : 0x080017

PHY Model Num. : 0x07

PHY Rev. Num.  : 0x0a

Status Register : 0x11

Speed Bit    : 3

Duplex Bit   : 1

Link Bit    : 2

 

Profile No. 3  :

PHY Name    : National DP83848C

PHY OUI     : 0x080017

PHY Model Num. : 0x09

PHY Rev. Num.  : 0x00

Status Register : 0x00

Speed Bit    : 0

Duplex Bit   : 0

Link Bit    : 0

 

Profile No. 4  :

PHY Name    : Intel PEF7071

PHY OUI     : 0x355969

PHY Model Num. : 0x00

PHY Rev. Num.  : 0x01

Status Register : 0x00

Speed Bit    : 0

Duplex Bit   : 0

Link Bit    : 0

 

INFO  : TSE MAC 0 found at address 0x00003000

INFO  : Multi Channel      = No

INFO  : MDIO Shared       = No

INFO  : MAC Type         = 10/100/1000 Ethernet MAC

INFO  : PCS Enable        = Yes

INFO  : PCS SGMII Enable     = Yes

INFO  : MAC Address       = 0x00003000

INFO  : MAC Device        = tse_mac_device[0]

INFO  : PHY Marvell 88E1111 found at PHY address 0x00 of MAC Group[0]

INFO  : PHY OUI       = 0x005043

INFO  : PHY Model Number  = 0x0c

INFO  : PHY Revision Number = 0x2

INFO  : PHY[0.0] - Automatically mapped to tse_mac_device[0]

INFO  : PHY[0.0] - Advertisement of 1000 Base-T Full Duplex set to 1

Created "Inet main" task (Prio: 2)

INFO  : PHY[0.0] - Advertisement of 1000 Base-T Half Duplex set to 1

INFO  : PHY[0.0] - Advertisement of 100 Base-T4 set to 0

INFO  : PHY[0.0] - Advertisement of 100 Base-TX Full Duplex set to 1

INFO  : PHY[0.0] - Advertisement of 100 Base-TX Half Duplex set to 1

INFO  : PHY[0.0] - Advertisement of 10 Base-TX Full Duplex set to 1

INFO  : PHY[0.0] - Advertisement of 10 Base-TX Half Duplex set to 1

INFO  : PHY[0.0] - Restart Auto-Negotiation, checking PHY link...

Created "clock tick" task (Prio: 3)

i value is 0

INFO  : PHY[0.0] - Auto-Negotiation PASSED

INFO  : Applying additional PHY configuration of Marvell 88E1111

 

INFO  : PCS[0.0] - Configuring PCS operating mode

INFO  : PCS[0.0] - PCS SGMII mode enabled

INFO  : PHY[0.0] - Checking link...

INFO  : PHY[0.0] - Link established

INFO  : PHY[0.0] - Speed = 1000, Duplex = Full

OK, x=0, CMD_CONFIG=0x00000000

 

MAC post-initialization: CMD_CONFIG=0x0400020b

[tse_msgdma_read_init] RX descriptor chain desc (9 depth) created

mctest init called

IP address of et1 : 192.168.5.4

 

Simple Socket Server starting up

 

 

 

Regards,

Biswajit

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7 Replies
Deshi_Intel
Moderator
81 Views

Hi Biswajit, You may want to try with lower level debug on TSE MAC first. Example like performing loopback testing to see where is the failure point. 1) Loopback within TSE IP 2) Loopback on External PHY chip 3) Then only finally loopback on external host side if possible If loopback is working then most likely is your higher software application layer issue. Thanks. Regards, dlim
BPani1
Beginner
81 Views

Hi ,

Thanks alot for your reply.But please explain how to perform the loopback within the TSE IP and on External PHY chip.

If i can get the reference design for the EVM which can compiled on 18.1 will be helpful.

 

Regards,

Biswajit

Deshi_Intel
Moderator
81 Views

Hi Biswajit, I found out about one A10 TSE reference design but it’s just tested the MAC functionality only. User needs to add own design for TCP/IP testing. • https://fpgacloud.intel.com/devstore/platform/15.0.0/Standard/arria-10-single-port-triple-speed-ethe... 1. For internal loopback within FPGA TSE IP • TSE IP user guide is available in below link • https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf • You can refer to chapter 4.1.9 for the “MAC local loopback” and chapter 4.2.8 for “PHY PCS/PMA loopback” 2. For on board external PHY chip loopback • You can refer to PHY chip datasheet for the register setting or consult the PHY chip vendor for support 3. For on board external host loopback • You can check your board to see whether it’s able to perform cable loopback somewhere on board Thanks. Regards, Deshi
BPani1
Beginner
81 Views

Hi Deshi,

I am able to configure the registers for MAC loop back test.But I don't know how to transmit a packet or receive a packet to confirm any MAC loop back is passed or failed.

Can you please share the API i should use to transmit the data.

Waiting for your valuable input.

 

Regards,

Biswajit

Deshi_Intel
Moderator
81 Views

Hi Biswajit, There is no software API. We expect user should know how to handle Ethernet IP data packet. Alternatively, you can refer to A10 TSE reference design that I shared with you earlier. The reference design should contains example traffic generator and checker design but the design should be in RTL form. Thanks. Regards, dlim
BPani1
Beginner
81 Views

Hi Dlim,

 

My concern is how to create a tcp packet and send it to the MAC .

If you have sample application which does transmitting of data will be helpful.

Also please share the Ethernet sample design file without loop back which i can build on quartus prime 18.1 version and test on the EVM

 

Regards,

Biswajit

Deshi_Intel
Moderator
81 Views

Hi Biswajit, Sorry, I am not familiar with how to generate TCP packet either. You can try google for answer. Hopefully some other experience user can jump in to help you or engage 3rd party designer house for design service. For the TSE MAC reference design, loopback is just a parameter controlled in tcl script. Thanks. Regards, dlim
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