Export Waveform/vector File (.VWf) as VHDL Testbench

Altera_Forum · ‎05-23-2015

Hello all,

I use recently Quartus II 14.0 (QuartusSetupWeb-14.0.0.200-windows 64 bit)

I would like generate a Test bench Output files .Vht from Waveform/vector File .VWf I created but I was unsuccessful .

The file .vwf opens in a separate window from Quartus and has no File > Export option

Before, I use Quartus II 8.1 and for the same I click on the File => Export ,then it’s generate and open a Test bench Output files .Vht .

I also tried : Under Simulation menu > select "Generate ModelSim Testbench and script". but, It generate verilog HDL file .

I then tried this,

I set the format output VHD from : settings=>EDA Tool Settings=>simulations=>EDA Netlist Writer Settings and after Apply.

After I again generate the waveform/vector File and select "Generate ModelSim Testbench and script". But, It again generate verilog HDL file.

When I return at the settings page I surprise to see that quartus change the format, it put Verilog HDL!

Cav you please describe the Steps to get the Format output Vht and not Vt.

Thanks in advance.

Please reply soon

thanks

Altera_Forum · ‎05-26-2015

YOu cannot use this to generate the testbench, you need to observe what command that had been used in the .vwf file and change the option from vht vt. something like -vhdl to - verilog. And use command prompt to insert the full command for the generation of testbench