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Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

FIR filter in Quartus

Altera_Forum
Honored Contributor II
2,271 Views

Hi, 

 

I am using the FIR compiler v8.0 in Quartus to design a lowpass FIR filter, the .vhd VHDL file and other files are generated by the tool, but I get an "unknown error" with the .bsf Block Symbol File, and this file isn't generated, anyone come across this type of error? 

 

cheers, 

Jamie
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Altera_Forum
Honored Contributor II
708 Views

creat it by youself

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Altera_Forum
Honored Contributor II
708 Views

as tangguoge said, a FIR filter is one of the simplest blocks in DSP Hardware and relatively simple to implement.  

 

this could help you 

 

http://www.alteraforum.com/forum/att...4&d=1223295458 

 

and this 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=741
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Altera_Forum
Honored Contributor II
708 Views

can you send me the code?i will check it and tell you..

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Altera_Forum
Honored Contributor II
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right clicking on the VHDL file and choosing Create Symbol Files for Current File will make a bsf for you.

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