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Altera_Forum
Honored Contributor I
2,583 Views

FPGA Based Flight Control System

Hi, Everybody. 

 

I'm trying to build a flight control system that is based on FPGA. 

Is there anybody on this platform who has experience related to this topic, as i'm new into FPGA's and i could use some help. 

Help needed mainly with the VHDL or Verilog Program to run the system. 

The Flight Control System in for a Quadcopter. 

Please help me in case you are familiar with this topic.
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16 Replies
Altera_Forum
Honored Contributor I
144 Views

what does your system need to do? Motor control, gyro's, gps etc?

Altera_Forum
Honored Contributor I
144 Views

Yes, sir.  

It needs to control: Motor, Gyro's, GPS, etc... 

i'm using Altera's Cyclone V FPGA Development board. 

The FPGA is meat to be the main processor of this Flight Control System. 

Please, help me if possible.
Altera_Forum
Honored Contributor I
144 Views

What part do you need help with? Have you drawn a block diagram? Did you read books about vhdl or verilog? I see you naming the FPGA a processor but keep in mind it isn't a processor in the sense of a CPU. Also you don't write a program, you design hardware. Search this forum for books, there are some good book tips.

Altera_Forum
Honored Contributor I
144 Views

Thank you very much for your feedback. 

I have some basic knowledge about the FPGA and also some besics in VHDL, as i have been busy with this for the past 2 weeks. 

I have a Diagram of how i think the system should work. 

How can i send it to you, so you can view it? your email address maybe? 

Thanks in advance. 

 

Note: The FPGA will be used as a floating point for low level parallel processing and DSP will be used as a floating point for the high level serial processing. 

I need help with programming the FPGA to execute its task.
Altera_Forum
Honored Contributor I
144 Views

You should post in this forum and ask specific questions. Others will not do work for you, there are many companies that you can pay to do that for you. 

So, exactly what problems do you have?
Altera_Forum
Honored Contributor I
144 Views

Tricky, i asked for the e-mail address coz Pietervanderstar wants to see the diagram.  

i don't see how i can insert the diagram in this platform, as i have just started using this platform since yesterday. in case there is a way i could post it here, please let me know. 

I think you got me wrong. I'm totally aware of existence of companies who do that. 

But this is a learning process for me and i just wanna learn from it. 

Anyways, let me know if you can help.
Altera_Forum
Honored Contributor I
144 Views

This forum allows posting of images, code and other things. Click the "go advanced" button and you should see the options. I recommend you link to the image that is off-site hosted as I dont think this forum supports larger images.

Altera_Forum
Honored Contributor I
144 Views

Thanks for your feedback. 

I will upload the diagram now and hopefully we can discuss about it.
Altera_Forum
Honored Contributor I
144 Views

As you can see from the diagram. 

Task 1: FPGA performs low-level and parallel interface functions for external components. 

Task 2: First-In First-Out (FIFO) for communication with the DSP. 

 

Question: How to define the external components in my VHDL program? 

Question: In which part of the program do i include the FIFO. 

 

Note: i'm sorry in advance in case my questions are very annoying. 

I'm really new to this.
Altera_Forum
Honored Contributor I
144 Views

You dont technically define the external components in VHDL, you define the drivers for the external components. You will need to read the datasheets for each component to understand how they are driven and then write code that drives them in the way that you need them to work. 

 

The FIFO will just be somewhere inside your design - where is up to how you decide to architect it.
Altera_Forum
Honored Contributor I
144 Views

Thank you very much. 

That makes things clear for me.
Altera_Forum
Honored Contributor I
144 Views

Just to clarify: I asked for the block diagram because those show how much thought has gone into designing. And us identifing a good starting point, such as the serial port or similar. In this case it showed a softcore cpu, which changes the viewpoint a bit.

Altera_Forum
Honored Contributor I
144 Views

@Pietervanderstar could you please share your point of view with me based on how you think i should approach this project on VHDL. 

Also, if you have any recommendation based on Books or Publications related to this project, i would highly appreciate.
Altera_Forum
Honored Contributor I
144 Views

concerning the books: https://www.alteraforum.com/forum/showthread.php?t=41998 

as for your project, you use a softcore thus you already have the serial port and memory controller. Then you need to think about how to handle the gps and "sensors" what is the interface to them? maybe the softcore has that interface as well. Then you only need to write software. If the interface is not on the nios then you can do two things, either writing a vhdl component to translate to another interface (usually GPIOs) or write software to emulate the interface using GPIOs.
Altera_Forum
Honored Contributor I
144 Views

@PietervanderStar thanks for the Link. It's really useful.  

Also thanks about the Project tips.
Altera_Forum
Honored Contributor I
144 Views

Hi, guys. 

The Cyclone V FPGA Development Board ( DE1-Board) comes with Dual Core ARM (HPS). 

 

Is it possible to upload my ARM existing program written in C-Language, and use it in the Cyclone V FPGA development board (DE1-Board)....???? 

If yes, how to do this.
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