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DTrif
Beginner
464 Views

FPGA not configured from flash EPCQ128A with generated .rbf file issue

FPGA is regularly configured with .jic file.

  • .jic and .rbf are generated from the same .sof, with Quartus Prime Standard Edition, Version 18.1.0
  • .jic and .rbf file generated with parameters:

Configuration device (FLASH) - EPCQ128A,

Flash Mode - ACTIVE SERIAL X4,

  • .sof file is made for FPGA device Cyclone V: 5CSXFC6D6F31I7
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7 Replies
YuanLi_S_Intel
Employee
134 Views

Hi Dragan,

 

Just would like to check, have you program SOF and JIC into the device before? Is it working fine?

 

Regards,

YL

DTrif
Beginner
134 Views

Hello,

FPGA is never configured from FPGA flash EPCQ128A with RBF which is generated by Quartus 18.1.0.

FPGA is always configured from FPGA flash EPCQ128A with JIC which is generated by Quartus 18.1.0.

 

Old FPGA flash EPCQ128N (Quartus 15.0.0 was used):

JIC (via JTAG) and RBF (via TFTP SW update) are successfully flashed on FPGA flash EPCQ128N and FPGA is configured after reboot device in both cases. Those JIC and RBF were generated by Quartus 15.0.0 from same SOF.

 

New FPGA flash EPCQ128A (Quartus 18.1.0 is used):

Now, we are using new FPGA flash EPCQ128A. For new FPGA flash (EPCQ128A) JIC and RBF are generated by Quartus 18.1.0 and state is:

  • JIC is flashed (via JTAG) on FPGA flash EPCQ128A and after reboot device, FPGA is successfully configured
  • RBF is flashed (via TFTP SW update) on FPGA flash EPCQ128A, but after reboot device, FPGA is not configured

Files JIC and RBF are generated from same SOF.

 

Regards,

Dragan

YuanLi_S_Intel
Employee
134 Views

Hi Dragan,

 

RBF file is meant for Passive Serial configuration scheme. I believe you should use RPD file instead.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qps-programmer.pdf (Page 4)

 

For RPD file, during the generation of it, you may need to set the order format to "Big Endian". To do so, select "Convert Programming File" on Quartus, then select "Options/Boot info.." and then select "Big Endian".

 

Regards,

YL

DTrif
Beginner
134 Views

Hello SooYL,

 

thank you for answer.

 

For flashing old FPGA flash EPCQ128N we use RBF file and due to we try to generate correct RBF file flashing new FPGA flash EPCQ128A as well.

We have tried with RPD, but size of that file was bigger than size of FPGA flash which is available from Linux.

Anyhow we will try to generate RPD according your suggestion.

 

JIC and RBF, which were generated for old FPGA flash EPCQ128N (Quartus 15.0.0 was used), have same sequences at the beginning of files:

JIC: ...6A 6A 6A 6A 36 F0 ...

RBF: ...6A 6A 6A 6A 36 F0 ...

 

while JIC and RBF, which are generated for new FPGA flash EPCQ128A (Quartus 18.1.0 is used), have different sequences at the beginning of files:

JIC: ...AF A6 A6 A6 66 03...

RBF: ...6A 6A 6A 6A 36 F0 ...

 

Have you noticed differences above? Do you have some explanation?

 

Regards,

Dragan

YuanLi_S_Intel
Employee
134 Views

Hi Dragon,

 

Yes, please try on RPD file. Meanwhile, RBF is a Raw Binary File. Thus there is no any special header available in the bitstream. Meanwhile, JIC has special header and it is required for Quartus Programmer to program the bitstream into flash memory.

 

Regards,

YL

DTrif
Beginner
134 Views

Hello,

 

we successfully generated RPD file according your suggestions. After flashing that RPD into FPGA flash and reboot, FPGA is properly configured.

 

Thank you very much for your help.

 

Regards,

Dragan

YuanLi_S_Intel
Employee
134 Views

Hi Dragan,

 

I am glad it helps. I am closing this thread now.

 

Regards,

YL

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