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Altera_Forum
Honored Contributor I
871 Views

Floating Point multiplication problem!

Hello! 

 

I'm trying to mult 10-bit bus with floating point constant 0.5. To do this I am using a IP FP arithmetic blocks. First - conversion 10 bit bus to 32 float, then - multiplication block (32 x 32 bits) by LPM_constant block(LPM_CVALUE = 0.5 float, LPM_width = 32) and finally - conversion to integer (from 32 to 10 bits). To check the operation I'm creating a waveform. The results is zero. Am I missing something?
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8 Replies
Altera_Forum
Honored Contributor I
63 Views

 

--- Quote Start ---  

Hello! 

 

I'm trying to mult 10-bit bus with floating point constant 0.5. To do this I am using a IP FP arithmetic blocks. First - conversion 10 bit bus to 32 float, then - multiplication block (32 x 32 bits) by LPM_constant block(LPM_CVALUE = 0.5 float, LPM_width = 32) and finally - conversion to integer (from 32 to 10 bits). To check the operation I'm creating a waveform. The results is zero. Am I missing something? 

--- Quote End ---  

 

 

if you just want to multiply by 0.5 then just discard one lsb
Altera_Forum
Honored Contributor I
63 Views

Multiplying by 0.5 is the same as divide by 2, which is just a 1 bit shift to the right, and discard the LSB (and/or maybe do some rounding). 

Why do you want to use floating point? 

LPM_Constant just drives an integer, not a floating point.
Altera_Forum
Honored Contributor I
63 Views

I want to be able to multiply not only by 0.5, also for example by 0.2, 0.6, 1.2, 1.5. When i click on the LPM_constant I can change the data format to float. Is this wrong?

Altera_Forum
Honored Contributor I
63 Views

Have you considered fixed point? the arithmatic is far simpler (it is just integer based mathematics) so the latency and resource requirements are much lower.

Altera_Forum
Honored Contributor I
63 Views

I think thats may be a good idea, but I dont know how to do this. I'am a newbie. Can I do this with IP cores from Quartus?

Altera_Forum
Honored Contributor I
63 Views

 

--- Quote Start ---  

I think thats may be a good idea, but I dont know how to do this. I'am a newbie. Can I do this with IP cores from Quartus? 

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to multiply by fraction you scale say by 2^10 then discard 10 lsb fro result, e.g. 

0.13 => round(0.13 x 2^10) = 133 

 

In FPGA, you multiply input by 133 then discard 10 lsbs
Altera_Forum
Honored Contributor I
63 Views

Thanks for help! 

On the other hand. I want to add a little offset to my NCO 10 bit sin signal. Sinus is represented by samples from 500 to -500. After adding 100 signed integer with adder from Altera IP (10 bits + 10 bits) at the DAC output I get a deformed sinus - the peak is inverted.  

Thanks in advance for any suggestion.
Altera_Forum
Honored Contributor I
63 Views

 

--- Quote Start ---  

Thanks for help! 

On the other hand. I want to add a little offset to my NCO 10 bit sin signal. Sinus is represented by samples from 500 to -500. After adding 100 signed integer with adder from Altera IP (10 bits + 10 bits) at the DAC output I get a deformed sinus - the peak is inverted.  

Thanks in advance for any suggestion. 

--- Quote End ---  

 

 

Might be you are discarding MSB from result. You shouldn't. 

You get 11 bits sum then you either use bits(10:1) or  

(9:0) but this needs clipping(not recommended)
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