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Generating an ultrasonic (40 KHz) square pulse for a distance sensor with VHDL

Altera_Forum
Honored Contributor II
‎12-10-2013 06:58 AM
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May anyone give me a hint how to generate a square pulse with VHDL to transmit it in a transducer for a distance sensor.  

 

Thanks 

 

Francisco.
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Altera_Forum
Honored Contributor II
‎12-10-2013 01:47 PM
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What's your fpga clock frequency? 

 

a-For example, if your fclk is 50MHz, count from 0 to 50MHz/40KHz=1250. 

 

b-add a comparator to the counter: when count<625 output is '1' else '0'. 

 

c-register the output to avoid glitches.
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Altera_Forum
Honored Contributor II
‎12-10-2013 05:58 PM
321 Views

I is actually 50 MHz, yet I have a given clock divider so I have different possible outputs, such as: 1 MHz, 100KHz, 10KHz, 1KHz, 100Hz,and 1 Hz. Ok, Thanks

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