Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Getting Error while generating Test Bench

Divya_Mulpuri
Beginner
‎06-07-2022 02:17 AM
515 Views

Hi Sir/Madam,

 I'm working on PCIE example design that is DMA chaining  (Gen 1x1 Avalon ST) on Quartus prime pro software version 21.4 . While generating a testbench i am getting error, can you please help me to resolve this error.

 

I have gone through the user guide manual but steps are not matching with the  Quartus prime pro software version 21.4 and I am using on device Cyclone 10GX.

 

 

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FvM
Valued Contributor III
‎01-15-2023 01:09 PM
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Hello,
I was recently stumbling upon the same issue. As far as I understand it's a bug in the platform designer testbench generator. It's trying to overwrite the original ed_xx .qsys file in Quartus installation folder which should never happen. It's still happening in QPP 22.4.

Instead of generating a testbench through generate menu as suggested in the user guide, you can use the generate button for the PCIe component.

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