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HDL powerful editor.

Altera_Forum
Honored Contributor II
3,021 Views

HDL Editor: the HDL Powerful Editor 

 

 

Verilog, VHDL which editor to use better? Mention to the experience. 

I used Quartus editor, and there are always defects. Very much appreciate the IntelliSense feature in Visual Studio. 

we want to design a power editor, we welcome more suggestions. 

The main function is: 

1.Syntax highlighting, folding. 

2.The perfect Chinese support. 

3. Quickly generate code templates support script. 

4. smart navigation  

5. Call structure diagram. 

6. Real-time code checking: (a difficult point ,to do some basic) 

7. Embedded the Icarus Verilog simulation. So easy to do some small simulation. 

 

 

 

 

Other. . . . . Please mention.
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Altera_Forum
Honored Contributor II
1,508 Views

For VHDL: look at sigasi (http://www.sigasi.com/)

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Altera_Forum
Honored Contributor II
1,508 Views

Interesting site, list of VHDL editors : http://www.vhdleditor.com/vhdl-ides

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Altera_Forum
Honored Contributor II
1,508 Views

Notepad++ is pretty good and free 

Some people seem to like HDL Designer from Mentor (others dont).
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Altera_Forum
Honored Contributor II
1,508 Views

thank of your advise. 

i wan create a open source project, thus we can do more extension.
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Altera_Forum
Honored Contributor II
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NotePad++ is a general-purpose editor, i wan to create a dedicated editor.. 

 

--- Quote Start ---  

Notepad++ is pretty good and free 

Some people seem to like HDL Designer from Mentor (others dont). 

--- Quote End ---  

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Altera_Forum
Honored Contributor II
1,508 Views

@ fpga_fan : Good idea but we have our habits with our preferred text editor. So a higly customisable editor will be great.  

 

I have found no free VHDL editors that are able to "refactor", I mean : to rename signals in VHDL files like rename variables in C files as Eclipse does 

I also open both VHDL files and Modelsim macros (.DO) in the same editor. 

I have made a few (alpha version) pythonscript for notepad++ for "refactoring" and for "copying derivated entities" 

I am contributing to "source cookifier" plugin to get a "functions list" for vhdl. 

 

Notepad++ lacks of VHDL templates (little work), hierarchy structure (much work)... 

 

Sigasi does "refactoring" with the state of the art (not like me :-)) but not free.
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