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Half-precision floating point?

Altera_Forum
Honored Contributor II
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Hi 

I'm wondering if anyone know does Arria 10 GX suppot half-precision floating point (FP16) operation when programmed by OpenCL? 

It's mentioned in the OpenCL programming guide, but nothing in the documentation of Arria 10 expect "Variable-precision digital signal processing (DSP) blocks integrated with hardened floating point". 

A paper titled "An OpenCL Deep Learning Accelerator on Arria 10" mentioned that FP16 is not natively supported, but can be done by "shared exponent technique", which I have no idea how it's done in OpenCL. 

 

Thanks:)
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Altera_Forum
Honored Contributor II
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I don't think half-precision is supported in the OpenCL compiler yet. Furthermore, since the DSPs in Arria 10 do not natively support half-precision, you will not get any DSP reduction by using half-precision compared to 32-bit float. In fact, doing that will likely increase DSP usage since you can perfom 32-bit FMADD with one DSP, but you will need at least two DSPs to perfom 16-bit FMADD (one for multiplication and one for addition). 

 

What is done in that paper is to "emulate" FP16 compute by using shared exponent 16-bit fixed-point compute which likely requires a lot of manual conversion, shifting, and bit masking. It is not real FP16 compute, but they show that they achieve the same accuracy compared to FP16. That paper is written by Altera's OpenCL team and nobody outside of Altera has access to their source code or knows how they have achieved what they claim.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Taking advantage of the discussion about OpenCL, I'm facing issues with Arria 10 license for OpenCL. So, my question is: Arria 10 GX supports FPGA SDK for OpenCL? 

--- Quote End ---  

 

 

It is best if you start a new thread if your question is not related to the existing discussion. 

Either way, if by "Arria 10 GX" you mean Altera's reference Arria 10 board, yes, that supports OpenCL.
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Altera_Forum
Honored Contributor II
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How to use fp16 in FPGA? 

I add# pragma OPENCL EXTENSION cl_khr_fp16 : enable, 

and declare data type from float to half in kernel code. 

the emulator compiler will pass, however the result is wrong. 

should I also modified host code too? but there is no support fp16 in C++.
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