Has anyone managed to program a .jic into an ISSI 128Mbit config program P/N IS25LP128

[CChal]

I am trying to program an ISSI 128Mbit config program using the serial flash loader. My device is an ARRIA V. I have done this for years but recently changed my config device to what I thought was an equivalent.

I previously used a Micron M25P128 without issue. All I have changed is the part. All tracking is the same. I can also program and config the ISSI device with our own software, so it works. I just can't program the device using the Quartus programmer.

Now Initially, the programmer wasn't happy with the silicon ID and refused to program. I then used V19.1 generic programmer to set the Device ID. The programmer would then program fine. When rebooted, the FPGA won't run because the contents of the config isn't right. I have done a verify on the config device and It fails at address 0x000200 (address location 512 decimal) .

I have also probed the lines during the program and the expected clock (12MHz) , viable data and the CS lines are all banging away.

I have used the generic 19.1 programmer to adjust what happens during the programming but it isn't happy with any of it. Here are some of the things I have tried in the programmer.

1) Checked all the commands are correct

2) Removed the command to use 4 bit addressing (I believe the ISSI uses 3) Removed extra commands during initialisation that write to the extended status registers that don't exist in the ISSI part

4) Added extra time to the program operation

5) During the erase process, changed the status register it was looking at for the WIP bit to 0x05

6) Used all the different templates micron,cypress, macronix

7) Increased delay after Write enable command

Has anyone made this work or has anymore ideas?

[ShafiqY_Intel]

Hi CChal,

I haven’t program a .jic into an ISSI 128Mbit.

However, in Quartus 19.1 version, we have a new feature which is we can defined our own flash device.

1.   Go to File > Convert Programming File

2.   On Programming file type, Select JTAG Indirect Configuration File (.jic)

3.   Select “ … ” button (on the left of the Mode option)

4.   Configuration Device windows pop-up

In this Configuration Device, you can define your own flash device and Quartus Programmer able to program withour error.

I think you can try to have a look at this new feature.

Unfortunately, there are two known issues regarding to this user-defined feature. Below are the workaround for these issues.

-         https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/component/2019/error-210026---file--user-directory---file-name--jic-is-corrupte.html

-         https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/component/2019/why-does-my-user-defined-flash-device-database-in-custom-configu.html

I hope this will help.

Thanks

[CChal]

Mshafiq,

Thanks but as I explained in the original post, I have already been using the generic flash programmer in 19.1 and tried all the different options to get the chip working and it just doesn't. Also one of the supported chips S25FL128 doesn't work either. If I choose a Winbond template and then program the S25FL128, it appears to work and run the code.

If anybody manages to get the S25FL128 or the ISSI part to work properly then let me know.

C

[CBATT]

Hi,

I believe that this problem may be solved. If not, here on how we manage to get this memory to work with Quartus 19.1 for write, erase and FPGA initialization.

1. Open Programmer
2. Go to File > Convert Programming File
3. Programming file type, select .jic
4. Open configuration device using "..."
5. Select your device family
6. Create a <<new device>>
7. Configure according to your memory datasheet
   1. e.g., name: IS25LP128, ID: 17, Density: 128Mb, Single dummy: 8, Quad dummy: 6
8. Select Micron as Flow template
9. Change Addressing mode(byte) from each flow tab from 4 to 3
10. In initialization tab:
    1. Remove everything except Read ID (Command 0x9F), Write Enable (Command 0x06) and Write status register (Command 0x01), keep this flow order
    2. Note that you need a Write Enable before sending other commands, check your memory datasheet for more info
11. In erase tab:
    1. Change Read flag status register to Read status register
    2. Change Command to 0x05 (ISSI memory uses the READ STATUS REGISTER OPERATION for erase status)
    3. Change Expected data to 0x00
    4. Change Expected data mask to 0x01

I hope this helps.

[indu_man]

Hi,

though its an old thread, however we are encountering a similar issue with IS25LP256D flash. This is ISSI 256Mb flash connected with Cyclone IV EP4CGX75 FPGA.

Using the above guidance I could setup the flash programming using 4-byte address mode (3-byte did not work for me perhaps, due to the larger size flash compared to 128Mb). 

Quartus Programmer v22.1, successfully Programs and can Verify the generated .jic file programming.

However, the design does not work. When the system is rebooted, the FPGA is not able to load the bitstream from the flash.

I tired to "Examine" the flash contents in the Quartus Programmer, however after successful examination the output Checksum is different from the file which was programmed.

Though the program/verify cycle is successful, I still doubt my device which I added using the above procedure.

Is there a standard (tested/working) device file to generate .jic file for ISSI 256 Mb flash which can use the Cyclone IV flash loader?

Any other idea where to look for problem is appreciated.

BR,

Adnan

[CChal]

Thanks for taking the time to reply Cbat. Much appreciated